DataSheet26.com

74HC377 PDF даташит

Спецификация 74HC377 изготовлена ​​​​«Philips» и имеет функцию, называемую «Octal D-type flip-flop with data enable positive-edge trigger».

Детали детали

Номер произв 74HC377
Описание Octal D-type flip-flop with data enable positive-edge trigger
Производители Philips
логотип Philips логотип 

7 Pages
scroll

No Preview Available !

74HC377 Даташит, Описание, Даташиты
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT377
Octal D-type flip-flop with data
enable; positive-edge trigger
Product specification
File under Integrated Circuits, IC06
December 1990









No Preview Available !

74HC377 Даташит, Описание, Даташиты
Philips Semiconductors
Octal D-type flip-flop with data enable;
positive-edge trigger
Product specification
74HC/HCT377
FEATURES
Ideal for addressable register applications
Data enable for address and data synchronization
applications
Eight positive-edge triggered D-type flip-flops
See “273” for master reset version
See “373” for transparent latch version
See “374” for 3-state version
Output capability: standard
ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT377 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT377 have eight edge-triggered, D-type
flip-flops with individual D inputs and Q outputs. A common
clock (CP) input loads all flip-flops simultaneously when
the data enable (E) is LOW. The state of each D input, one
set-up time before the LOW-to-HIGH clock transition, is
transferred to the corresponding output (Qn) of the flip-flop.
The E input must be stable only one set-up time prior to the
LOW-to-HIGH transition for predictable operation.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
SYMBOL
PARAMETER
CONDITIONS
tPHL/ tPLH
fmax
CI
CPD
propagation delay CP to Qn
maximum clock frequency
input capacitance
power dissipation capacitance per flip-flop
CL = 15 pF; VCC = 5 V
notes 1 and 2
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz
fo = output frequency in MHz
(CL × VCC2 × fo) = sum of outputs
CL = output load capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC 1.5 V
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
TYPICAL
UNIT
HC HCT
13 14 ns
77 53 MHz
3.5 3.5 pF
20 20 pF
December 1990
2









No Preview Available !

74HC377 Даташит, Описание, Даташиты
Philips Semiconductors
Octal D-type flip-flop with data enable;
positive-edge trigger
Product specification
74HC/HCT377
PIN DESCRIPTION
PIN NO.
1
2, 5, 6, 9, 12, 15, 16, 19
3, 4, 7, 8, 13, 14, 17, 18
10
11
20
SYMBOL
E
Q0 to Q7
D0 to D7
GND
CP
VCC
NAME AND FUNCTION
data enable input (active LOW)
flip-flop outputs
data inputs
ground (0 V)
clock input (LOW-to-HIGH, edge-triggered)
positive supply voltage
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
December 1990
3










Скачать PDF:

[ 74HC377.PDF Даташит ]

Номер в каталогеОписаниеПроизводители
74HC373Octal D-type transparent latch 3-statePhilips
Philips
74HC373Octal D-type transparent latchNXP Semiconductors
NXP Semiconductors
74HC374Octal D-type flip-flop positive edge-trigger 3-statePhilips
Philips
74HC374Octal 3-State Non-Inverting D Flip-FlopON Semiconductor
ON Semiconductor

Номер в каталоге Описание Производители
TL431

100 мА, регулируемый прецизионный шунтирующий регулятор

Unisonic Technologies
Unisonic Technologies
IRF840

8 А, 500 В, N-канальный МОП-транзистор

Vishay
Vishay
LM317

Линейный стабилизатор напряжения, 1,5 А

STMicroelectronics
STMicroelectronics

DataSheet26.com    |    2020    |

  Контакты    |    Поиск