74HC4316 PDF даташит
Спецификация 74HC4316 изготовлена «Philips» и имеет функцию, называемую «Quad bilateral switches». |
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Детали детали
Номер произв | 74HC4316 |
Описание | Quad bilateral switches |
Производители | Philips |
логотип |
15 Pages
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INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
• The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT4316
Quad bilateral switches
Product specification
File under Integrated Circuits, IC06
September 1993
No Preview Available ! |
Philips Semiconductors
Quad bilateral switches
Product specification
74HC/HCT4316
FEATURES
• Low “ON” resistance:
160 Ω (typ.) at VCC − VEE = 4.5 V
120 Ω (typ.) at VCC − VEE = 6.0 V
80 Ω (typ.) at VCC − VEE = 9.0 V
• Logic level translation:
to enable 5 V logic to communicate
with ± 5 V analog signals
• Typical “break before make” built in
• Output capability: non-standard
• ICC category: MSI
GENERAL DESCRIPTION
The 74HC/HCT4316 are high-speed Si-gate CMOS
devices. They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT4316 have four independent analog
switches. Each switch has two input/output terminals
(nY, nZ) and an active HIGH select input (nS). When the
enable input (E) is HIGH, all four analog switches are
turned off.
Current through a switch will not cause additional VCC
current provided the voltage at the terminals of the switch
is maintained within the supply voltage range;
VCC >> (VY, VZ) >> VEE. Inputs nY and nZ are electrically
equivalent terminals.
VCC and GND are the supply voltage pins for the digital
control inputs (E and nS). The VCC to GND ranges are 2.0
to 10.0 V for HC and 4.5 to 5.5 V for HCT.
The analog inputs/outputs (nY and nZ) can swing between
VCC as a positive limit and VEE as a negative limit.
VCC − VEE may not exceed 10.0 V.
See the “4016” for the version without logic level
translation.
QUICK REFERENCE DATA
VEE = GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
SYMBOL
PARAMETER
tPZH
tPZL
tPHZ/ tPLZ
CI
CPD
CS
turn “ON” time
E to VOS
nS to VOS
turn “ON” time
E to VOS
nS to VOS
turn “OFF” time
E to VOS
nS to VOS
input capacitance
power dissipation capacitance per switch
max. switch capacitance
CONDITIONS
TYPICAL
HC HCT
CL = 15 pF; RL = 1 kΩ;
VCC = 5 V
19
19
16 17
19 24
16 21
notes 1 and 2
20 21
16 19
3.5 3.5
13 14
55
UNIT
ns
ns
ns
ns
ns
ns
pF
pF
pF
Notes
1. CPD is used to determine the dynamic power
dissipation (PD in µW):
PD = CPD × VCC2 × fi + ∑ { (CL + CS) × VCC2 × fo }
where:
fi = input frequency in MHz
fo = output frequency in MHz
∑ { (CL + CS) × VCC2 × fo } = sum of outputs
CL = output load capacitance in pF
CS = max. switch capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC − 1.5 V
September 1993
2
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Philips Semiconductors
Quad bilateral switches
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
PIN DESCRIPTION
PIN NO.
1, 4, 10, 13
2, 3, 11, 12
7
8
9
15, 5, 6, 14
16
SYMBOL
1Z to 4Z
1Y to 4Y
E
GND
VEE
1S to 4S
VCC
NAME AND FUNCTION
independent inputs/outputs
independent inputs/outputs
enable input (active LOW)
ground (0 V)
negative supply voltage
select inputs (active HIGH)
positive supply voltage
Product specification
74HC/HCT4316
Fig.1 Pin configuration.
Fig.2 Logic symbol.
(b)
Fig.3 IEC logic symbol.
September 1993
3
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