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74HC534 PDF даташит

Спецификация 74HC534 изготовлена ​​​​«Philips» и имеет функцию, называемую «Octal D-type flip-flop positive edge-trigger 3-state inverting».

Детали детали

Номер произв 74HC534
Описание Octal D-type flip-flop positive edge-trigger 3-state inverting
Производители Philips
логотип Philips логотип 

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74HC534 Даташит, Описание, Даташиты
INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT534
Octal D-type flip-flop; positive
edge-trigger; 3-state; inverting
Product specification
Supersedes data of September 1993
File under Integrated Circuits, IC06
1998 Apr 10









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74HC534 Даташит, Описание, Даташиты
Philips Semiconductors
Octal D-type flip-flop; positive edge-trigger;
3-state; inverting
Product specification
74HC/HCT534
FEATURES
3-state inverting outputs for bus oriented applications
8-bit positive, edge-triggered register
Common 3-state output enable input
Output capability: bus driver
ICC category: MSI.
GENERAL DESCRIPTION
The 74HC/HCT534 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT534 are octal D-type flip-flops featuring
separate D-type inputs for each flip-flop and inverting
3-state outputs for bus oriented applications. A clock (CP)
and an output enable (OE) input are common to all
flip-flops.
The 8 flip-flops will store the state of their individual
D-inputs that meet the set-up and hold times requirements
on the LOW-to-HIGH CP transition. When OE is LOW, the
contents of the 8 flip-flops are available at the outputs.
When OE is HIGH, the outputs go to the high impedance
OFF-state. Operation of the OE input does not affect the
state of the flip-flops.
The “534” is functionally identical to the “374”, but has
inverted outputs.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
HC HCT
tPHL/ tPLH
fmax
CI
CPD
propagation delay CP to Qn
maximum clock frequency
input capacitance
power dissipation capacitance per flip-flop
CL = 15 pF; VCC = 5 V
notes 1 and 2
12
61
3.5
19
13
40
3.5
19
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW):
PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz.
fo = output frequency in MHz.
(CL × VCC2 × fo) = sum of outputs.
CL = output load capacitance in pF.
VCC = supply voltage in V.
2. For HC the condition is VI = GND to VCC; for HCT the condition is VI = GND to VCC 1.5 V.
UNIT
ns
MHz
pF
pF
ORDERING INFORMATION
TYPE
NUMBER
74HC534
74HC534
74HCT534
74HCT534
NAME
SO20
DIP20
SO20
DIP20
PACKAGE
DESCRIPTION
plastic small outline package; 20 leads; body width 7.5 mm
plastic dual in-line package; 20 leads (300 mil)
plastic small outline package; 20 leads; body width 7.5 mm
plastic dual in-line package; 20 leads (300 mil)
VERSION
SOT163-1
SOT146-1
SOT163-1
SOT146-1
1998 Apr 10
2









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74HC534 Даташит, Описание, Даташиты
Philips Semiconductors
Octal D-type flip-flop; positive edge-trigger;
3-state; inverting
Product specification
74HC/HCT534
PIN DESCRIPTION
PIN NO.
1
2, 5, 6, 9, 12, 15, 16, 19
3, 4, 7, 8, 13, 14, 17, 18
10
11
20
SYMBOL
OE
Q0 to Q7
D0 to D7
GND
CP
VCC
NAME AND FUNCTION
3-state output enable input (active LOW)
3-state outputs
data inputs
ground (0 V)
clock input (LOW-to-HIGH, edge-triggered)
positive supply voltage
fpage
OE 1
Q0 2
D0 3
D1 4
Q1 5
Q2 6
D2 7
D3 8
Q3 9
GND 10
20 VCC
19 Q7
18 D7
17 D6
16 Q6
534
15 Q5
14 D5
13 D4
12 Q4
11 CP
MGM954
Fig.1 Pin configuration.
page
11
CP
3 D0
Q0
4 D1
Q1
7 D2
Q2
8 D3
Q3
13 D4
Q4
14 D5
Q5
17 D6
Q6
18 D7 OE Q7
2
5
6
9
12
15
16
19
1 MGM955
Fig.2 Logic symbol.
fpage
1 EN
11
C1
3 1D
4
7
8
13
14
17
18
2
5
6
9
12
15
16
19
MGM956
Fig.3 IEC logic symbol.
1998 Apr 10
3










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