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PDF 74HC573 Data sheet ( Hoja de datos )

Número de pieza 74HC573
Descripción Octal 3-State Noninverting Transparent Latch(High-Performance Silicon-Gate CMOS)
Fabricantes System Logic　
Logotipo System Logic Logotipo



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No Preview Available ! 74HC573 Hoja de datos, Descripción, Manual

SL74HC573
Octal 3-State Noninverting Transparent Latch
High-Performance Silicon-Gate CMOS
The SL74HC573 is identical in pinout to the LS/ALS573. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LS/ALSTTL outputs.
These latches appear transparent to data (i.e., the outputs change
asynchronously) when Latch Enable is high. When Latch Enable goes
low, data meeting the setup and hold time becomes latched.
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 µA
• High Noise Immunity Characteristic of CMOS Devices
ORDERING INFORMATION
SL74HC573N Plastic
SL74HC573D SOIC
TA = -55° to 125° C for all packages
LOGIC DIAGRAM
PIN ASSIGNMENT
PIN 20=VCC
PIN 10 = GND
SLS
System Logic
Semiconductor
FUNCTION TABLE
Inputs
Output
Output Latch
Enable Enable
D
Q
L HH
H
L HL
L
L L X no change
H XX
Z
X = don’t care
Z = high impedance

1 page




74HC573 pdf
SL74HC573
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms
Figure 3. Switching Waveforms
Figure 4. Switching Waveforms
EXPANDED LOGIC DIAGRAM
Figure 5. Test Circuit
Figure 6. Test Circuit
SLS
System Logic
Semiconductor

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