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PDF 74HCT137 Data sheet ( Hoja de datos )
| Número de pieza | 74HCT137 | |
| Descripción | 3-to-8 line decoder/demultiplexer with address latches inverting | |
| Fabricantes | Philips | |
| Logotipo |  |
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INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
• The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Information
• The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT137
3-to-8 line decoder/demultiplexer
with address latches; inverting
Product specification
File under Integrated Circuits, IC06
December 1990
1 page  
Philips Semiconductors
3-to-8 line decoder/demultiplexer with
address latches; inverting
Product specification
74HC/HCT137
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: MSI
AC CHARACTERISTICS FOR 74HC
GND = 0 V; tr = tf = 6 ns; CL = 50 pF
Tamb (°C)
TEST CONDITIONS
SYMBOL PARAMETER
+25
min. typ. max.
74HC
−40 to +85
min. max.
UNIT
−40 to +125
min. max.
VCC WAVEFORMS
(V)
tPHL/ tPLH
propagation delay
An to Yn
tPHL/ tPLH
propagation delay
LE to Yn
58 180 225 270
2.0
21 36 45 54 ns 4.5 Fig.6
17 31 38 46
6.0
55 190 240 285
2.0
20 38 48 57 ns 4.5 Fig.7
16 32 41 48
6.0
tPHL/ tPLH
propagation delay
E1 to Yn
50 145 180 220
2.0
18 29 36 44 ns 4.5 Fig.7
14 25 31 38
6.0
tPHL/ tPLH
propagation delay
E2 to Yn
tTHL/ tTLH output transition time
50 145 180 220
2.0
18 29 36 44 ns 4.5 Fig.6
14 25 31 38
6.0
19 75 95 110 2.0
7 15 19 22 ns 4.5 Fig.6
6 13 16 19
6.0
tW
LE pulse width
HIGH
50 11
10 4
93
65 75
13 15
11 13
2.0
ns 4.5 Fig.8
6.0
tsu
set-up time
An to LE
th
hold time
An to LE
50 3
10 1
91
30 3
61
51
65 75
13 15
11 13
40 45
89
78
2.0
ns 4.5 Fig.8
6.0
2.0
ns 4.5 Fig.8
6.0
December 1990
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet 74HCT137.PDF ] | |
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