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PDF CA5130 Data sheet ( Hoja de datos )
| Número de pieza | CA5130 | |
| Descripción | BiMOS Microprocessor Operational Amplifier with MOSFET Input/CMOS Output | |
| Fabricantes | Intersil | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de CA5130 (archivo pdf) en la parte inferior de esta página. Total 19 Páginas | ||
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TM POSSDOIBaBLtaSEOSSLhUEeBCTeSAEtT3PI1TR3UO0TDEUPCRTODUCT
CA5130, CA5130A
March 2000 File Number 1923.6
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15MHz, BiMOS Microprocessor
Operational Amplifiers with MOSFET
Input/CMOS Output
CA5130A and CA5130 are integrated circuit operational
amplifiers that combine the advantage of both CMOS and
bipolar transistors on a monolithic chip. They are designed
and guaranteed to operate in microprocessors or logic
systems that use +5V supplies.
Gate protected P-Channel MOSFET (PMOS) transistors are
used in the input circuit to provide very high input
impedance, very low input current, and exceptional speed
performance. The use of PMOS field effect transistors in the
input stage results in common mode input voltage capability
down to 0.5V below the negative supply terminal, an
important attribute in single supply applications.
A complementary symmetry MOS (CMOS) transistor-pair,
capable of swinging the output voltage to within 10mV of
either supply voltage terminal (at very high values of load
impedance), is employed as the output circuit.
The CA5130 Series circuits operate at supply voltages ranging
from 4V to 16V, or ±2V to ±8V when using split supplies. They
can be phase compensated with a single external capacitor,
and have terminals for adjustment of offset voltage for
applications requiring offset null capability. Terminal provisions
are also made to permit strobing of the output stage.
The CA5130A, CA5130 have guaranteed specifications for
5V operation over the full military temperature range of
-55oC to 125oC.
Pinout
CA5130 (PDIP)
TOP VIEW
OFFSET NULL 1
INV. INPUT 2
NON-INV. INPUT 3
V- 4
+
8 STROBE
7 V+
6 OUTPUT
5 OFFSET NULL
Features
• MOSFET Input Stage
- Very High Zl . . . . . . . . . . . . . 1.5TΩ (1.5 x 1012Ω) (Typ)
- Very Low ll . . . . . . . . . . . . . 5pA (Typ) at 15V Operation
2pA (Typ) at 5V Operation
• Ideal for Single Supply Applications
• Common Mode Input Voltage Range Includes
Negative Supply Rail; Input Terminals Can Be Swung
0.5V Below Negative Supply Rail
• CMOS Output Stage Permits Signal Swing to Either (or Both)
Supply Rails
• CA5130A, CA5130 Have Full Military Temperature Range
Guaranteed Specifications for V+ = 5V
• CA5130A, CA5130 Are Guaranteed to Operate Down to
V+ = 4.5V for AOL
• CA5130A, CA5130 Are Guaranteed to Operate at ±7.5V
CA3130A, CA3130 Specifications
Applications
• Ground Referenced Single Supply Amplifiers
• Fast Sample-Hold Amplifiers
• Long Duration Timers/Monostables
• High Input lmpedance Comparators (Ideal Interface with
Digital CMOS)
• High lnput Impedance Wideband Amplifiers
• Voltage Followers (e.g., Follower for Single-Supply
D/A Converter)
• Voltage Regulators (Permits Control of Output Voltage
Down to 0V)
• Peak Detectors
• Single Supply Full Wave Precision Rectifiers
• Photo Diode Sensor Amplifiers
• 5V Logic Systems
• Microprocessor Interface
Part Number Information
PART NUMBER
(BRAND)
CA5130AE
CA5130E
TEMP.
RANGE (oC)
PACKAGE
-55 to 125 8 Ld PDIP
-55 to 125 8 Ld PDIP
PKG.
NO.
E8.3
E8.3
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright © Intersil Corporation 2000
1 page  
CA5130, CA5130A
Schematic Diagram
BIAS CIRCUIT
CURRENT SOURCE FOR
Q6 AND Q7
Q1
Z1
8.3V
R1
D1
D2
D3
D4
40kΩ R2
5kΩ
NON-INV.
INPUT
3+
INV. INPUT
2-
Q2
Q4
INPUT
STAGE
D5 D6 (NOTE 6) D7
D8
Q6 Q7
R3
1kΩ
Q9 Q10
R4
1kΩ
“CURRENT SOURCE
LOAD” FOR Q11
Q3
Q5
SECOND
STAGE
Q11
OUTPUT
STAGE
R5 R6
1kΩ 1kΩ
7 V+
Q8
OUTPUT
6
Q12
5 OFFSET NULL 1
COMPENSATION
NOTE:
6. Diodes D5 through D8 provide gate oxide protection for MOSFET Input Stage.
Block Diagram
8
STROBING
4 V-
CA5130
200µA 1.35mA
BIAS CKT.
200µA
8mA (NOTE 7)
0mA (NOTE 8)
V+
7
+
3
INPUT
2
-
AV ≈ 5X
AV ≈
6000X
AV ≈
30X
51
OFFSET
NULL
CC
COMPENSATION
(WHEN REQUIRED)
8
STROBE
OUTPUT
6
V-
4
NOTES:
7. Total supply voltage (for indicated voltage gains)
= 15V with input terminals biased so that
Terminal 6 potential is +7.5V above Terminal 4.
8. Total supply voltage (for indicated voltage gains)
= 15V with output terminal driven to either
supply rail.
5
5 Page 
CA5130, CA5130A
Peak Detectors
Peak detector circuits are easily implemented with the
CA5130, as illustrated in Figure 7 for both the peak positive
and the peak negative circuit. It should be noted that with
large signal inputs, the bandwidth of the peak negative
circuit is much less than that of the peak positive circuit. The
second stage of the CA5130 limits the bandwidth in this
case. Negative going output signal excursion requires a
positive going signal excursion at the collector of transistor
Q11, which is loaded by the intrinsic capacitance of the
associated circuitry in this mode. On the other hand, during
a negative going signal excursion at the collector of Q11, the
transistor functions in active “pull down” mode so that the
intrinsic capacitance can be discharged more expeditiously.
Error Amplifier In Regulated Power Supplies
The CA5130 is an ideal choice for error amplifier service in
regulated power supplies since it can function as an error
amplifier when the regulated output voltage is required to
approach 0V. Figure 8 shows the schematic diagram of a
40mA power supply capable of providing regulated output
voltage by continuous adjustment over the range from 0V to
13V. Q3 and Q4 in IC2 (a CA3066 transistor array lC)
function as zeners to provide supply voltage for the CA5130
comparator (lC1). Q1, Q2, and Q5 in lC2 are configured as a
low impedance, temperature compensated source of
adjustable reference voltage for the error amplifier.
Transistors Q1, Q2, Q3, and Q4 in lC3 (another CA3086
transistor array lC) are connected in parallel as the series
pass element. Transistor Q5 in lC3 functions as a current
limiting device by diverting base drive from the series pass
transistors, in accordance with the adjustment of resistor R2.
Figure 9 contains the schematic diagram of a regulated
power supply capable of providing regulated output voltage
by continuous adjustment over the range from 0.1V to 50V
and currents up to 1A. The error amplifier (lC1) and circuitry
associated with lC2 function as previously described,
although the output of lC1 is boosted by a discrete transistor
(Q4) to provide adequate base drive for the Darlington
connected series pass transistors Q1, Q2. Transistor Q3
functions in the previously described current limiting circuit.
Multivibrators
The exceptionally high input resistance presented by the
CA5130 is an attractive feature for multivibrator circuit
design because it permits the use of timing circuits with high
R/C ratios. The circuit diagram of a pulse generator (astable
multivibrator), with provisions for independent control of the
“on” and “off” periods, is shown in Figure 10. Resistors R1
and R2 are used to bias the CA5130 to the midpoint of the
supply voltage and R3 is the feedback resistor. The pulse
repetition rate is selected by positioning S1 to the desired
position and the rate remains essentially constant when the
resistors which determine “on period” and “off period” are
adjusted.
Function Generator
Figure 11 contains a schematic diagram of a function
generator using the CA5130 in the integrator and threshold
detector functions. This circuit generates a triangular or
square wave output that can be swept over a 1,000,000:1
range (0.1Hz to 100kHz) by means of a single control, R1. A
voltage control input is also available for remote sweep
control.
The heart of the frequency determining system is an
operational transconductance amplifier (OTA) (see Note 9),
lC1, operated as a voltage controlled current source. The
output, IO, is a current applied directly to the integrating
capacitor, C1, in the feedback loop of the integrator lC2,
using a CA5130, to provide the triangular wave output.
Potentiometer R2 is used to adjust the circuit for slope
symmetry of positive going and negative going signal
excursions.
Another CA5130, lC3, is used as a controlled switch to set
the excursion limits of the triangular output from the
integrator circuit. Capacitor C2 is a “peaking adjustment” to
optimize the high frequency square wave performance of the
circuit.
Potentiometer R3 is adjustable to perfect the “amplitude
symmetry” of the square wave output signals. Output from
the threshold detector is fed back via resistor R4 to the input
of lC1 so as to toggle the current source from plus to minus
in generating the linear triangular wave.
Operation with Output Stage Power-Booster
The current sourcing and sinking capability of the CA5130
output stage is easily supplemented to provide power boost
capability. In the circuit of Figure 12, three CMOS transistor
pairs in a single CA3600E (see Note 10) lC array are shown
parallel connected with the output stage in the CA5130. In
the Class A mode of CA3600E shown, a typical device
consumes 20mA of supply current at 15V operation. This
arrangement boosts the current handling capability of the
CA5130 output stage by about 2.5X.
The amplifier circuit in Figure 12 employs feedback to
establish a closed-loop gain of 48dB. The typical large signal
bandwidth (-3dB) is 50kHz.
NOTES:
9. See File No. 475 and AN6668.
10. See File No. 619 for technical information.
11
11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet CA5130.PDF ] | |
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