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PDF NTHS5443 Data sheet ( Hoja de datos )

Número de pieza NTHS5443
Descripción Power MOSFET ( Transistor )
Fabricantes ON Semiconductor 
Logotipo ON Semiconductor Logotipo



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NTHS5443
Power MOSFET
−20 V, −4.9 A, P−Channel ChipFETt
Features
Low RDS(on) for Higher Efficiency
Logic Level Gate Drive
Miniature ChipFET Surface Mount Package Saves Board Space
Pb−Free Package is Available
Applications
Power Management in Portable and Battery−Powered Products; i.e.,
Cellular and Cordless Telephones and PCMCIA Cards
http://onsemi.com
V(BR)DSS
−20 V
RDS(on) TYP
56 mW @ −4.5
ID MAX
−4.9 A
S
MAXIMUM RATINGS (TA = 25°C unless otherwise noted)
Rating
Steady
Symbol 5 secs State
Unit
Drain−Source Voltage
Gate−Source Voltage
Continuous Drain Current
(TJ = 150°C) (Note 1)
TA = 25°C
TA = 85°C
Pulsed Drain Current
Continuous Source Current (Note 1)
Maximum Power Dissipation (Note 1)
TA = 25°C
TA = 85°C
Operating Junction and Storage
Temperature Range
VDS
VGS
ID
IDM
IS
PD
TJ, Tstg
−20
"12
−4.9 −3.6
−3.5 −2.6
"15
−4.9 −3.6
2.5 1.3
1.3 0.7
−55 to +150
V
V
A
A
A
W
°C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.27 in sq
[1 oz] including traces).
G
D
P−Channel MOSFET
8
1
ChipFET
CASE 1206A
STYLE 1
PIN
CONNECTIONS
MARKING
DIAGRAM
D8
D7
D6
S5
1D
2D
3D
4G
1
2
3
4
8
7
6
5
A4 = Specific Device Code
M = Month Code
G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
Package
Shipping
NTHS5443T1 ChipFET 3000/Tape & Reel
NTHS5443T1G ChipFET 3000/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2005
July, 2005 − Rev. 6
1
Publication Order Number:
NTHS5443T1/D

1 page




NTHS5443 pdf
NTHS5443
PACKAGE DIMENSIONS
ChipFETt
CASE 1206A−03
ISSUE G
HE
e1
D
8765
1234
E
b
e
q
c
L
5678
4321
A
0.05 (0.002)
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. MOLD GATE BURRS SHALL NOT EXCEED 0.13 MM PER SIDE.
4. LEADFRAME TO MOLDED BODY OFFSET IN HORIZONTAL
AND VERTICAL SHALL NOT EXCEED 0.08 MM.
5. DIMENSIONS A AND B EXCLUSIVE OF MOLD GATE BURRS.
6. NO MOLD FLASH ALLOWED ON THE TOP AND BOTTOM LEAD
SURFACE.
MILLIMETERS
DIM MIN NOM MAX
A 1.00
1.05
1.10
b 0.25 0.30 0.35
c 0.10 0.15 0.20
D 2.95
3.05
3.10
E 1.55
1.65
1.70
e 0.65 BSC
e1 0.55 BSC
L 0.28 0.35 0.42
H E 1.80
1.90
2.00
q 5° NOM
MIN
0.039
0.010
0.004
0.116
0.061
0.011
0.071
INCHES
NOM
0.041
0.012
0.006
0.120
0.065
0.025 BSC
0.022 BSC
0.014
0.075
5° NOM
MAX
0.043
0.014
0.008
0.122
0.067
0.017
0.079
STYLE 1:
PIN 1. DRAIN
2. DRAIN
3. DRAIN
4. GATE
5. SOURCE
6. DRAIN
7. DRAIN
8. DRAIN
SOLDERING FOOTPRINT*
0.457
0.018
2.032
0.08
0.635
0.025
2.032
0.08
1.727
0.068
0.66
0.026
0.711
0.028
ǒ ǓSCALE 20:1
mm
inches
0.457
0.018
0.66
0.026
0.711
0.028
0.178
0.007
ǒ ǓSCALE 20:1
mm
inches
Basic
Styles 1 and 4
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
5

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