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PDF SC1189 Data sheet ( Hoja de datos )
| Número de pieza | SC1189 | |
| Descripción | Programmable Synchronous DC/DC Converter / Dual LDO Controller | |
| Fabricantes | Semtech | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de SC1189 (archivo pdf) en la parte inferior de esta página. Total 16 Páginas | ||
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SC1189
Programmable Synchronous DC/DC
Converter, Dual LDO Controller
POWER MANAGEMENT
Description
Features
The SC1189 combines a synchronous voltage mode
controller with two low-dropout linear regulators
providing most of the circuitry necessary to implement
three DC/DC converters for powering advanced
microprocessors such as Pentium®III.
The SC1189 switching section features an integrated 5
bit D/A converter, latched drive output for enhanced noise
immunity, pulse by pulse current limiting and logic
compatible shutdown. The SC1189 switching section
operates at a fixed frequency of 200kHz, providing an op-
timum compromise between size, efficiency and cost in
the intended application areas. The integrated D/A con-
verter provides programmability of output voltage from
1.05V to 1.825V in 25mV increments with no external
components.
The SC1189 linear sections are low dropout regulators
with short circuit protection, supplying 1.25V for Vtt and
2.5V for non-GTL I/O. They can be easily adjusted to sup-
ply higher voltages e.g. 1.8V chipset.
·Synchronous design, enables no heatsink solution
95% efficiency (switching section)
5 bit DAC for output programmability
Designed for Intel Pentium® III requirements
1.25V, 2.5V short circuit protected linear controllers
Linear controllers adjustable to 1.8V chipset.
VRM 8.5 Compliant
VRM 8.4 Compliant (1.3V to 1.8V)
1.0% accuracy (1.6V to 1.8V)
On Chip Power Good Signal
Available in Lead free package, fully WEEE and
RoHS compliant.
Applications
Pentium® III microprocessor supplies
1.050V to 1.825V microprocessor supplies
Programmable triple power supplies
Simplified Application Circuit
12V
5V
+
1500uF
x4
10
0.1uF
VID25MV
VID0
VID1
VID2
VID3
EN
3.3V
U6
5 VCC
7 LDOEN
22 VID25MV
21 VID0
20 VID1
19 VID2
18 VID3
16 EN
1 AGND
23 LDOV
24 GATE2
4 LDOS2
SC1189CS
CS+ 9
CS- 8 0.1uF
VOSENSE 17
BSTH 15
DH 11
BSTL 14
DL 13
PGNDH 10
PGNDL 12
PWRGD 6
GATE1 2
LDOS1 3
2R2
2R2
330uF
+
1.8V
+
330uF
442
1.0k
2.5V
+
330uF
+
47uF
0.1uF
0.1uF
1.2uH
1.00k
OPEN
2.5mOhm
VCC_CORE
1k
5V
+
1500uF
x6
0.1uF
10k
PWRGD
Revision: November 1, 2007
1
www.semtech.com
1 page  
POWER MANAGEMENT
Block Diagram
SC1189
VID3
VID2
VID1
VID0
VID25MV
VOSENSE
PWRGD
LDOEN
LDOS1
GATE1
VCC
CS- CS+
REF
ERROR
AMP
70mV
CURRENT
LIMIT
+
-
D/A +
-
-
+
EN
+
-
OPEN
COLLECTORS
+
-
OSCILLATOR
AGND
R
Q
S
2.5V FET
CONTROLLER
REF
1.25V FET
CONTROLLER
BSTH
LEVEL SHIFT AND
HIGH SIDE DRIVE
DH
PGNDH
SHOOT-THRU
CONTROL
SYNCHRONOUS
MOSFET DRIVE
BSTL
DL
PGNDL
LDOV
GATE2 LDOS2
AGND
2007 Semtech Corp.
5
www.semtech.com
5 Page 
SC1189
POWER MANAGEMENT
FOLDBACK CURRENT LIMITING
The SC1189 implements a “Hard Current Limit”
overcurrent protection for the switching supply output. In
a short circuit condition, this will lead to higher than nor-
mal power dissipation in the bottom side FETs. If this is
problematic, foldback current limiting can be easily and
inexpensively implemented to drastically reduce dissipa-
M
=
IOLIM
IOS
3) Choose VB and calculate RB
RB
=
M ⋅ VB ⋅ RD ⋅ RF
(M − 1)VCS(RD + RF )
4) Calculate the ratio of the input divider
tion during output short circuit
VIN
RA RB
RC
D1
To CS+
To CS-
VCS
RC
(RA + RC )
=
VB
+
VCS
VIN
+
VF
where VF = Forward Voltage drop of diode (≈ 0.6V)
Choose RC<RB/10 and calculate RA
1N4148
SHORT CIRCUIT PROTECTION - LINEARS
RD RF
The Short circuit feature on the linear controllers is imple-
mented by using the Rds(on) of the FETs. As output cur-
L1 RS
VO
rent increases, the regulation loop maintains the output
voltage by turning the FET on more and more. Eventually,
Output Current Path
Foldback current limit components
as the Rds(on) limit is reached, the FET will be unably to
turn on more fully, and output voltage will start to fall.
When the output voltage falls to approximately 50% of
nominal, the LDO controller is latched off, setting output
voltage to 0. Power must be cycled to reset the latch.
To prevent false latching due to capacitor inrush currents
1 or low supply rails, the current limit latch is initially dis-
Breakpoint
abled. It is enabled at a preset time (nominally 2mS) after
VB
both the LDOV and LDOEN rails rise above their lockout
points.
To be most effective, the linear FET Rds(on) should not be
selected artificially low, the FET should be chosen so that,
0
0 IOS
at maximum required current, it is almost fully turned on.
IO1LIM If, for example, a linear supply of 1.5V at 4A is required
from a 3.3V ± 5% rail, max allowable Rds(on) would be.
Foldback current limit characteristics
Rds(on)max = (0.95*3.3-1.5)/4 » 400mΩ
To allow for temperature effects 200mΩ would be a suit-
able room temperature maximum, allowing a peak short
For a complete design procedure for foldback current lim- circuit current of approximately 15A for a short time be-
iting see Application Note AN01-2, “Foldback Current fore shutdown.
Limit”. An abbreviated procedure is given below.
1) Choose values for IOLIM and RS and calculate the ratio
RF
RD + RF
=
VCS
IOLIM ⋅ RS
If this ratio > 1, the value of RS or IOLIM must be increased.
Then let RF=1kW and calculate RD.
2) Choose a short circuit current (IOS) and calculate M, do
not be too agressive with M, a value between 2 and 3
should be sufficient. Choosing too low a value for IOS will
result in a high value for M and may cause startup prob-
lems due to insufficient current.
2007 Semtech Corp.
11
www.semtech.com
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet SC1189.PDF ] | |
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