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74HC4066D PDF даташит

Спецификация 74HC4066D изготовлена ​​​​«NXP Semiconductors» и имеет функцию, называемую «(74HC4066x) Quad bilateral switches».

Детали детали

Номер произв 74HC4066D
Описание (74HC4066x) Quad bilateral switches
Производители NXP Semiconductors
логотип NXP Semiconductors логотип 

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74HC4066D Даташит, Описание, Даташиты
INTEGRATED CIRCUITS
DATA SHEET
74HC4066; 74HCT4066
Quad bilateral switches
Product specification
Supersedes data of 2003 Jun 17
2004 Nov 11









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74HC4066D Даташит, Описание, Даташиты
Philips Semiconductors
Quad bilateral switches
Product specification
74HC4066; 74HCT4066
FEATURES
Very low ON-resistance:
– 50 (typical) at VCC = 4.5 V
– 45 (typical) at VCC = 6.0 V
– 35 (typical) at VCC = 9.0 V.
Complies with JEDEC standard no. 7A
ESD protection:
HBM EIA/JESD22-A114-B exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
Specified from 40 °C to +85 °C and 40 °C to +125 °C.
GENERAL DESCRIPTION
The 74HC4066 and 74HCT4066 are high-speed Si-gate
CMOS devices and are pin compatible with the
HEF4066B. They are specified in compliance with JEDEC
standard no. 7A.
The 74HC4066 and 74HCT4066 have four independent
analog switches. Each switch has two input/output pins
(pins nY or nZ) and an active HIGH enable input pin
(pin nE). When pin nE = LOW the belonging analog switch
is turned off.
The 74HC4066 and 74HCT4066 are pin compatible with
the 74HC4016 and 74HCT4016 but exhibit a much lower
on-resistance. In addition, the on-resistance is relatively
constant over the full input signal range.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns.
SYMBOL
PARAMETER
tPZH/tPZL
tPHZ/tPLZ
CI
CPD
CS
turn-on time nE to Vos
turn-off time nE to Vos
input capacitance
power dissipation
capacitance per switch
maximum switch
capacitance
CONDITIONS
TYPICAL
UNIT
74HC4066 74HCT4066
CL = 15 pF; RL = 1 k; VCC = 5 V 11 12 ns
CL = 15 pF; RL = 1 k; VCC = 5 V 13 16 ns
3.5 3.5 pF
notes 1 and 2
11 12 pF
8 8 pF
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + Σ[(CL + CS) × VCC2 × fo] where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
CS = maximum switch capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ[(CL + CS) × VCC2 × fo] = sum of the outputs.
2. For 74HC4066 the condition is VI = GND to VCC.
For 74HCT4066 the condition is VI = GND to VCC 1.5 V.
2004 Nov 11
2









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74HC4066D Даташит, Описание, Даташиты
Philips Semiconductors
Quad bilateral switches
Product specification
74HC4066; 74HCT4066
FUNCTION TABLE
See note 1.
INPUT nE
L
H
Note
1. H = HIGH voltage level.
L = LOW voltage level.
ORDERING INFORMATION
TYPE NUMBER
74HC4066N
74HCT4066N
74HC4066D
74HCT4066D
74HC4066DB
74HCT4066DB
74HC4066PW
74HCT4066PW
74HC4066BQ
74HCT4066BQ
TEMPERATURE RANGE
40 °C to 125 °C
40 °C to 125 °C
40 °C to 125 °C
40 °C to 125 °C
40 °C to 125 °C
40 °C to 125 °C
40 °C to 125 °C
40 °C to 125 °C
40 °C to 125 °C
40 °C to 125 °C
PINNING
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
SYMBOL
DESCRIPTION
1Y independent input/output
1Z independent input/output
2Z independent input/output
2Y independent input/output
2E enable input (active HIGH)
3E enable input (active HIGH)
GND
ground (0 V)
3Y independent input/output
3Z independent input/output
4Z independent input/output
4Y independent input/output
4E enable input (active HIGH)
1E enable input (active HIGH)
VCC supply voltage
SWITCH
off
on
PACKAGE
PINS
PACKAGE
14 DIP14
14 DIP14
14 SO14
14 SO14
14 SSOP14
14 SSOP14
14 TSSOP14
14 TSSOP14
14 DHVQFN14
14 DHVQFN14
MATERIAL
plastic
plastic
plastic
plastic
plastic
plastic
plastic
plastic
plastic
plastic
CODE
SOT27-1
SOT27-1
SOT108-1
SOT108-1
SOT337-1
SOT337-1
SOT402-1
SOT402-1
SOT762-1
SOT762-1
handbook, halfpage
1Y 1
1Z 2
2Z 3
2Y 4
2E 5
3E 6
GND 7
14 VCC
13 1E
12 4E
4066 11 4Y
10 4Z
9 3Z
8 3Y
MGR253
Fig.1 Pin configuration DIP14, SO14 and
(T)SSOP14.
2004 Nov 11
3










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