82830MP PDF даташит
Спецификация 82830MP изготовлена «Intel» и имеет функцию, называемую «Graphics and Memory Controller». |
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Детали детали
Номер произв | 82830MP |
Описание | Graphics and Memory Controller |
Производители | Intel |
логотип |
30 Pages
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Intel® 830MP Chipset: 82830MP
Graphics and Memory Controller
Hub (GMCH-M)
Datasheet
July 2001
Order Number: 298338-001
No Preview Available ! |
Intel® 830MP Chipset
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Information in this document is provided in connection with Intel products. No license, express or implied, by estoppel or otherwise, to any intellectual
property rights is granted by this document. Except as provided in Intel’s Terms and Conditions of Sale for such products, Intel assumes no liability
whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to fitness
for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel products are not intended for use in
medical, life saving, or life sustaining applications.
Intel may make changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future
definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
The 830MP Graphics-Memory Controller Hub- Mobile (GMCH-M) product may contain design defects or errors known as errata which may cause the
product to deviate from published specifications. Current characterized errata are available on request.
I2C is a two-wire communications bus/protocol developed by Philips. SMBus is a subset of the I2C bus/protocol and was developed by Intel.
Implementations of the I2C bus/protocol or the SMBus bus/protocol may require licenses from various entities, including Philips Electronics N.V. and North
American Philips Corporation.
Intel® is a registered trademark of Intel Corporation and its subsidiaries in the United States and other countries.
*Other brands and names are the property of their respective owners.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
Copyright © Intel Corporation 2001
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Datasheet
298338-001
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Intel® 830MP Chipset
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Contents
1 Introduction .................................................................................................................................13
1.1 Document References ...................................................................................................13
2 Overview.....................................................................................................................................14
2.1 Terminology ...................................................................................................................15
2.2 System Architecture.......................................................................................................16
2.3 Host Interface.................................................................................................................16
2.4 System Memory Interface ..............................................................................................16
2.5 AGP Interface ................................................................................................................17
3 Signal Description.......................................................................................................................18
3.1 Host Interface Signals....................................................................................................20
3.2 System Memory Interface ..............................................................................................22
3.3 AGP Interface Signals....................................................................................................23
3.3.1
AGP Addressing Signals .............................................................................23
3.3.2
AGP Flow Control Signals ...........................................................................24
3.3.3
AGP Status Signals .....................................................................................24
3.3.4
AGP Clocking Signals – Strobes .................................................................25
3.3.5
PCI Signals - AGP Semantics ....................................................................26
3.3.6
PCI Pins During PCI Transactions on AGP Interface..................................27
3.4 Hub Interface Signals.....................................................................................................28
3.5 Clocking and Reset........................................................................................................29
3.6 Intel 830MP Reserve Signals ........................................................................................30
3.6.1
Graphics Memory Interface .........................................................................30
3.6.2
Dedicated Digital Video Port (DVOA) ..........................................................31
3.7 Analog Display ...............................................................................................................32
3.7.1
Display Control Signals................................................................................33
3.8 Voltage References, PLL Power....................................................................................34
3.9 Strap Signals..................................................................................................................35
4 Register Description ...................................................................................................................36
4.1 Conceptual Overview of the Platform Configuration Structure ......................................36
4.2 Routing Configuration Accesses to PCI0 or AGP/PCI...................................................37
4.2.1
Intel 82830MP GMCH-M Configuration Cycle Flow Charts ........................38
4.2.2
PCI Bus Configuration Mechanism..............................................................38
4.2.3
PCI Bus #0 Configuration Mechanism.........................................................39
4.2.4
Primary PCI and Downstream Configuration Mechanism ...........................39
4.2.5
AGP/PCI1 Bus Configuration Mechanism ...................................................40
4.2.6
Internal GMCH-M Configuration Register Access Mechanism ...................42
4.3 GMCH-M Register Introduction .....................................................................................42
4.4 I/O Mapped Registers ....................................................................................................43
4.4.1
CONFIG_ADDRESS - Configuration Address Register ..............................43
4.4.2
CONFIG_DATA - Configuration Data Register ...........................................45
4.5 GMCH-M Internal Device Registers ..............................................................................45
4.5.1
SDRAM Controller/Host-hub Interface Device Registers - Device #0.........46
4.5.1.1 VID - Vendor Identification Register - Device #0 ............................48
4.5.1.2 DID - Device Identification Register - Device #0.............................48
4.5.1.3 PCICMD - PCI Command Register - Device #0 .............................49
4.5.1.4 PCISTS - PCI Status Register - Device #0 .....................................50
298338-001
Datasheet
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