|
|
PDF 74LS107 Data sheet ( Hoja de datos )
| Número de pieza | 74LS107 | |
| Descripción | DM74LS107 | |
| Fabricantes | ETC | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de 74LS107 (archivo pdf) en la parte inferior de esta página. Total 6 Páginas | ||
|
No Preview Available !
June 1989
DM54LS107A DM74LS107A Dual Negative-Edge-
Triggered Master-Slave J-K Flip-Flops with
Clear and Complementary Outputs
General Description
This device contains two independent negative-edge-trig-
gered J-K flip-flops with complementary outputs The J and
K data is processed by the flip-flops on the falling edge of
the clock pulse The clock triggering occurs at a voltage
level and is not directly related to the transition time of the
negative going edge of the clock pulse The data on the J
and K inputs may change while the clock is high or low
without affecting the outputs as long as setup and hold
times are not violated A low logic level on the clear input
will reset the outputs regardless of the logic levels of the
other inputs
Connection Diagram
www.DataSheet4U.com
Dual-In-Line Package
TL F 6367 – 1
Order Number DM54LS107AJ DM54LS107AW DM74LS107AM or DM74LS107AN
See NS Package Number J14A M14A N14A or W14B
Function Table
Inputs
Outputs
CLR CLK J K
Q
Q
L
X
XX
L
H
vH
L L Q0
Q0
H v HL H L
H v LH L H
H v HH
Toggle
H
H
X X Q0
Q0
H e High Logic Level
X e Either Low or High Logic Level
L e Low Logic Level
v e Negative going edge of pulse
Q0 e The output logic level before the indicated input conditions were established
Toggle e Each output changes to the complement of its previous level on each falling edge of the clock pulse
C1995 National Semiconductor Corporation TL F 6367
RRD-B30M105 Printed in U S A
1 page  
Physical Dimensions inches (millimeters) (Continued)
www.DataSheet4U.com
14-Lead Small Outline Molded Package (M)
Order Number DM74LS107AM
NS Package Number M14A
14-Lead Molded Dual-In-Line Package (N)
Order Number DM74LS107AN
NS Package Number N14A
5
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet 74LS107.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| 74LS10 | TRIPLE 3-INPUT NAND GATE |  ON Semiconductor |
| 74LS10 | Triple 3-Input NAND Gate |  Fairchild Semiconductor |
| 74LS107 | DM74LS107 | ETC |
| 74LS109 | Dual J-K Flip-Flop |  Agere Systems |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |