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PDF 74ALS580 Data sheet ( Hoja de datos )
| Número de pieza | 74ALS580 | |
| Descripción | SN74ALS580 | |
| Fabricantes | ETC | |
| Logotipo |  |
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SN54ALS580B, SN74ALS580B, SN74AS580
OCTAL DĆTYPE TRANSPARENT LATCHES
WITH 3ĆSTATE OUTPUTS
SDAS277 − JANUARY 1995
• 3-State Buffer-Type Outputs Drive Bus
Lines Directly
• Bus-Structured Pinout
• Inverting-Logic Outputs
• Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK), Standard Plastic (N) and
Ceramic (J) 300-mil DIPs, and Ceramic Flat
(W) Packages
description
These octal D-type transparent latches feature
3-state outputs designed specifically for driving
highly capacitive or relatively low-impedance
loads. They are particularly suitable for
implementing buffer registers, I/O ports,
bidirectional bus drivers, and working registers.
SN54ALS580B . . . J OR W PACKAGE
SN74ALS580B, SN74AS580 . . . DW OR N PACKAGE
(TOP VIEW)
OE
1D
2D
3D
4D
5D
6D
7D
8D
GND
1
2
3
4
5
6
7
8
9
10
20 VCC
19 1Q
18 2Q
17 3Q
16 4Q
15 5Q
14 6Q
13 7Q
12 8Q
11 LE
SN54ALS580B . . . FK PACKAGE
(TOP VIEW)
While the latch-enable (LE) input is high, outputs
(Q) respond to the data (D) inputs. When LE is low,
the outputs are latched to retain the data that was
set up.
A buffered output-enable (OE) input can be used
to place the eight outputs in either a normal logic
state (high or low) or a high-impedance state. In
the high-impedance state, the outputs neither load
nor drive the bus lines significantly. The
high-impedance state and the increased drive
provide the capability to drive bus lines without
interface or pullup components.
3D
3 2 1 20 19
4 18
2Q
4D 5
17 3Q
5D 6
16 4Q
6D 7
15 5Q
7D 8
14 6Q
9 10 11 12 13
OE does not affect internal operations of the latches. Old data can be retained or new data can be entered while
the outputs are in the high-impedance state.
The SN54ALS580B is characterized for operation over the full military temperature range of − 55°C to 125°C.
The SN74ALS580B and SN74AS580 are characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each latch)
INPUTS
OE LE
D
OUTPUT
Q
L HH
L
LHL
H
LLX
HXX
Q0
Z
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 1995, Texas Instruments Incorporated
•POST OFFICE BOX 655303 DALLAS, TEXAS 75265
•POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
1
1 page  
SN54ALS580B, SN74ALS580B, SN74AS580
OCTAL DĆTYPE TRANSPARENT LATCHES
WITH 3ĆSTATE OUTPUTS
SDAS277 − JANUARY 1995
switching characteristics (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
VCC = 4.5 V to 5.5 V,
CL = 50 pF,
R1 = 500 Ω,
R2 = 500 Ω,
TA = MIN to MAX†
SN74AS580
MIN MAX
tPLH
tPHL
D
3
Q
3
tPLH
tPHL
LE
5
Q4
tPZH
tPZL
OE
2
Q
4
tPHZ
tPLZ
OE
2
Q
2
† For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
7.5
7
9
8
6.5
9.5
6.5
7
UNIT
ns
ns
ns
ns
•POST OFFICE BOX 655303 DALLAS, TEXAS 75265
•POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
5
5 Page 
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet 74ALS580.PDF ] | |
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