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74HC4060M PDF даташит

Спецификация 74HC4060M изготовлена ​​​​«ETC» и имеет функцию, называемую «High Speed CMOS Logic 14-Stage Binary Counter».

Детали детали

Номер произв 74HC4060M
Описание High Speed CMOS Logic 14-Stage Binary Counter
Производители ETC
логотип ETC логотип 

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74HC4060M Даташит, Описание, Даташиты
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Data sheet acquired from Harris Semiconductor
SCHS207
February 1998
CD74HC4060,
CD74HCT4060
High Speed CMOS Logic
14-Stage Binary Counter with Oscillator
[ /Title
(CD74
HC406
0,
CD74
HCT40
60)
/Sub-
ject
(High
Speed
CMOS
Features
• Onboard Oscillator
• Common Reset
• Negative Edge Clocking
• TTAyp=ic2a5lofCMAX = 50MHz at VCC = 5V, CL = 15pF,
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC
at VCC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
VIL= 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il 1µA at VOL, VOH
Pinout
CD74HC4060, CD74HCT4060
(PDIP, SOIC)
TOP VIEW
Q12 1
Q13 2
Q14 3
Q6 4
Q5 5
Q7 6
Q4 7
GND 8
16 VCC
15 Q10
14 Q8
13 Q9
12 MR
11 φI
10 φO
9 φO
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © Harris Corporation 1998
1
File Number 1654.1









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74HC4060M Даташит, Описание, Даташиты
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CD74HC4060, CD74HCT4060
Description
TTL switching levels.
The Harris CD74HC4060 and CD74HCT4060 each consist
of an oscillator section and 14 ripple-carry binary counter
stages. The oscillator configuration allows design of either
RC or crystal oscillator circuits. A Master Reset input is
provided which resets the counter to the all-0’s state and
disables the oscillator. A high level on the MR line
accomplishes the reset function. All counter stages are
master-slave flip-flops. The state of the counter is advanced
one step in binary order on the negative transition of φI (and
φO). All inputs and outputs are buffered. Schmitt trigger
action on the input-pulse-line permits unlimited rise and fall
times.
In order to achieve a symmetrical waveform in the oscillator
section the HCT4060 input pulse switch points are the same
as in the HC4060; only the MR input in the HCT4060 has
Ordering Information
PART NUMBER TEMP. RANGE (oC) PACKAGE
PKG.
NO.
CD74HC4060E
-55 to 125
16 Ld PDIP E16.3
CD74HCT4060E
-55 to 125
16 Ld PDIP E16.3
CD74HC4060M
-55 to 125
16 Ld SOIC M16.15
CD74HCT4060M
-55 to 125
16 Ld SOIC M16.15
NOTES:
1. When ordering, use the entire part number. Add the suffix 96 to
obtain the variant in the tape and reel.
2. Wafer and die for this part number is available which meets all
electrical specifications. Please contact your local sales office or
Harris customer service for ordering information.
Functional Diagram
12
MR
φI 11
14-STAGE
RIPPLE
COUNTER
AND
OSCILLATOR
7
Q4
5
Q5
4
Q6
6
Q7
14
Q8
13
Q9
15
Q10
1
Q12
2
Q13
3
Q14
9
φO
10
φO
GND = 8
VCC = 16
2









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74HC4060M Даташит, Описание, Даташиты
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øO 9
10
øO
11
ø1
12
MR
CD74HC4060, CD74HCT4060
ø1 Q1
FF1
ø1 Q1
R
ø4 Q4
FF4
ø4 Q4
R
ø5 Q13
FF5 - FF13
ø5 Q13
R
ø14 Q14
FF14
ø14 Q14
R
72
Q4 5, 4, 6, 14, 13, 15, 1 Q13
Q5 - Q10, Q12
FIGURE 1. LOGIC BLOCK DIAGRAM
TRUTH TABLE
øI MR OUTPUT STATE
L No Change
L Advance to Next State
X H All Outputs are Low
3
Q14
3










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