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CD40163BC PDF даташит

Спецификация CD40163BC изготовлена ​​​​«National Semiconductor» и имеет функцию, называемую «(CD40160BM - CD40163BM) Decade Counter with Asynchronous Clear».

Детали детали

Номер произв CD40163BC
Описание (CD40160BM - CD40163BM) Decade Counter with Asynchronous Clear
Производители National Semiconductor
логотип National Semiconductor логотип 

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CD40163BC Даташит, Описание, Даташиты
March 1988
CD40160BM CD40160BC
Decade Counter with Asynchronous Clear
CD40161BM CD40161BC
Binary Counter with Asynchronous Clear
CD40162BM CD40162BC
Decade Counter with Synchronous Clear
CD40163BM CD40163BC
Binary Counter with Synchronous Clear
General Description
These (synchronous presettable up) counters are monolith-
ic complementary MOS (CMOS) integrated circuits con-
structed with N- and P-channel enhancement mode transis-
tors They feature an internal carry look-ahead for fast
counting schemes and for cascading packages without ad-
ditional gating
A low level at the load input disables counting and causes
the outputs to agree with the data input after the next posi-
tive clock edge The clear function for the CD40162B and
CD40163B is synchronous and a low level at the clear input
sets all four outputs low after the next positive clock edge
The clear function for the CD40160B and CD40161B is
asynchronous and a low level at the clear input sets all four
outputs low regardless of the state of the clock
Counting is enabled when both count enable inputs are
high Input T is fed forward to also enable the carry out The
carry output is a positive pulse with a duration approximately
equal to the positive portion of QA and can be used to en-
able successive cascaded stages Logic transitions at the
enable P or T inputs can occur when the clock is high or
low
Features
Y Wide supply voltage range
3 0V to 15V
Y High noise immunity
Y Low power TTL
0 45 VDD (typ )
fan out of 2 driving 74L
compatibility
or 1 driving 74LS
Y Internal look-ahead for fast counting schemes
Y Carry output for N-bit cascading
Y Load control line
Y Synchronously programmable
Y Equivalent to MC14160B MC14161B MC14162B
MC14163B
Y Equivalent to MM74C160 MM74C161 MM74C162
MM74C163
Connection Diagram
Dual-In-Line Package
Order Number CD40160B CD40161B
CD40162B or CD40163B
Top View
C1995 National Semiconductor Corporation TL F 5986
TL F 5986 – 1
RRD-B30M105 Printed in U S A









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CD40163BC Даташит, Описание, Даташиты
Absolute Maximum Ratings (Notes 1 2)
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
DC Supply Voltage (VDD)
Input Voltage (VIN)
Storage Temperature Range (TS)
Power Dissipation (PD)
Dual-In-Line
Small Outline
b0 5 to a18 VDC
b0 5 to VDD a0 5 VDC
b65 C to a150 C
700 mW
500 mW
Lead Temperature
(Soldering 10 seconds)
260 C
Recommended Operating
Conditions (Note 2)
DC Supply Voltage (VDD)
3V to 15 VDC
Input Voltage (VIN)
0V to VDD VDC
Operating Temperature Range (TA)
CD40XXXBM
CD40XXXBC
b55 C to a125 C
b40 C to a85 C
DC Electrical Characteristics CD40160BM CD40161BM CD40162BM CD40163BM (Note 2)
Symbol
IDD
VOL
VOH
VIL
VIH
IOL
IOH
IIN
Parameter
Quiescent Device
Current
Low Level Output
Voltage
High Level Output
Voltage
Low Level Input
Voltage
High Level Input
Voltage
Low Level Output
Current (Note 3)
High Level Output
Current (Note 3)
Input Current
Conditions
VDD e 5V
VDD e 10V
VDD e 15V
lIOl k 1 mA
VDD e 5V
VDD e 10V
VDD e 15V
lIOl k 1 mA
VDD e 5V
VDD e 10V
VDD e 15V
VDDe5V VOe0 5V or 4 5V
VDDe10V VOe1V or 9V
VDDe15V VOe1 5V or 13 5V
VDDe5V VOe0 5V or 4 5V
VDDe10V VOe1V or 9V
VDDe15V VOe1 5V or 13 5V
VDDe5V VOe0 4V
VDDe10V VOe0 5V
VDDe15V VOe1 5V
VDDe5V VOe4 6V
VDDe10V VOe9 5V
VDDe15V VOe13 5V
VDDe15V VINe0V
VDDe15V VINe15V
b55 C
Min Max
5
10
20
0 05
0 05
0 05
4 95
9 95
14 95
35
70
11 0
0 64
16
42
b0 64
b1 6
b4 2
15
30
40
b0 10
0 10
Min
4 95
9 95
14 95
35
70
11 0
0 51
13
34
b0 51
b1 3
b3 4
Limits
a25 C
Typ
5
10
15
0 88
2 25
88
b0 88
b2 25
b8 8
b10b5
10b5
Max
5
10
20
0 05
0 05
0 05
15
30
40
b0 10
0 10
a125 C
Min Max
150
300
600
0 05
0 05
0 05
4 95
9 95
14 95
35
70
11 0
0 36
09
24
b0 36
b0 9
b2 4
15
30
40
b1 0
10
Units
mA
mA
mA
V
V
V
V
V
V
V
V
V
V
V
V
mA
mA
mA
mA
mA
mA
mA
mA
DC Electrical Characteristics CD40160BC CD40161BC CD40162BC CD40163BC (Note 2)
Symbol
IDD
VOL
VOH
VIL
Parameter
Quiescent Device Current
Low Level Output
Voltage
High Level Output
Voltage
Low Level Input
Voltage
Conditions
VDD e 5V
VDD e 10V
VDD e 15V
lIOl k 1 mA
VDD e 5V
VDD e 10V
VDD e 15V
lIOl k 1 mA
VDD e 5V
VDD e 10V
VDD e 15V
VDDe5V VOe0 5V or 4 5V
VDDe10V VOe1V or 9V
VDDe15V VOe1 5V or 13 5V
b40 C
Min Max
20
40
80
0 05
0 05
0 05
4 95
9 95
14 95
15
30
40
Limits
a25 C
Min Typ Max
20
40
80
0 05
0 05
0 05
4 95
9 95
14 95
5
10
15
15
30
40
a85 C
Min Max
150
300
600
0 05
0 05
0 05
4 95
0 95
14 95
15
30
40
Units
mA
mA
mA
V
V
V
V
V
V
V
V
V
2









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CD40163BC Даташит, Описание, Даташиты
DC Electrical Characteristics CD40160BC CD40161BC CD40162BC CD40163BC (Note 2) (Continued)
Symbol
VIH
IOL
IOH
IIN
Parameter
High Level Input
Voltage
Low Level Output
Current (Note 3)
High Level Output
Current (Note 3)
Input Current
Conditions
VDDe5V VOe0 5V or 4 5V
VDDe10V VOe1V or 9V
VDDe15V VOe1 5V or 13 5V
VDDe5V VOe0 4V
VDDe10V VOe0 5V
VDDe15V VOe1 5V
VDDe5V VOe4 6V
VDDe10V VOe9 5V
VDDe15V VOe13 5V
VDDe15V VINe0V
VDDe15V VINe15V
b40 C
Min Max
35
70
11 0
0 52
13
36
b0 52
b1 3
b3 6
b0 30
0 30
Min
35
70
11 0
0 44
11
30
b0 44
b1 1
b3 0
Limits
a25 C
Typ
0 88
2 25
88
b0 88
b2 25
b8 8
b10b5
10b5
Max
b0 30
0 30
a85 C
Min Max
35
70
11 0
0 36
09
24
b0 36
b0 9
b2 4
b1 0
10
Units
V
V
V
mA
mA
mA
mA
mA
mA
mA
mA
AC Electrical Characteristics TA e 25 C CL e 50 pF RL e 200k unless otherwise specified
Symbol
Parameter
Conditions Min Typ Max Units
tPHL or tPLH
Propagation Delay Time from
Clock to Q
VDD e 5V
VDD e 10V
VDD e 15V
250 400
100 160
80 130
ns
ns
ns
tPHL or tPLH
Propagation Delay Time from
Clock to Carry Out
VDD e 5V
VDD e 10V
VDD e 15V
290 450
120 190
100 160
ns
ns
ns
tPHL or tPLH
Propagation Delay Time from T
Enable to Carry Out
VDD e 5V
VDD e 10V
VDD e 15V
180 290
70 130
60 110
ns
ns
ns
tPHL
Propagation Time from Clear to Q
(CD40160B CD40161B Only)
VDD e 5V
VDD e 10V
VDD e 15V
190 300
80 150
70 120
ns
ns
ns
tSU
Minimum Time Prior to Clock that
VDD e 5V
Data or Load must be Present
VDD e 10V
VDD e 15V
120
30
25
ns
ns
ns
tSU
Minimum Time Prior to Clock that
VDD e 5V
Enable P or T must be Present
VDD e 10V
VDD e 15V
170 280
70 120
60 100
ns
ns
ns
tSU
Minimum Time Prior to Clock that
VDD e 5V
Clear must be Present (CD40162B
VDD e 10V
CD40163B Only)
VDD e 15V
120 190
50 80
40 70
ns
ns
ns
tWL or tWH
Maximum Clock Pulse Width
VDD e 5V
VDD e 10V
VDD e 15V
125 250
45 90
35 70
ns
ns
ns
tRCL or tFCL
Maximum Clock Rise or Fall Time
VDD e 5V
VDD e 10V
VDD e 15V
15 ms
5 0 ms
5 0 ms
fCL
Maximum Clock Frequency
VDD e 5V 2 4
VDD e 10V
55
11
VDD e 15V
7
14
MHz
MHz
MHz
tTHL or tTLH
Transition Time
All Outputs
VDD e 5V
VDD e 10V
VDD e 15V
100 200
50 100
40 80
ns
ns
ns
CIN
Average Input Capacitance
Any Input
50 75
pF
CPD Power Dissipation Capacity (Note 4)
95 pF
AC Parameters are guaranteed by DC correlated testing
Note 1 ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed they are not meant to imply that the devices
should be operated at these limits The table of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provides conditions for actual device
operation
Note 2 VSS e 0V unless otherwise specified
Note 3 IOH and IOL are tested one output at a time
Note 4 CPD determines the no load AC power consumption of any CMOS device For complete explanation see 54C 74C Family Characteristics application note
AN-90
3










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