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PDF CDB8421 Data sheet ( Hoja de datos )
| Número de pieza | CDB8421 | |
| Descripción | 32-bit / 192 kHz Asynchronous Sample Rate Converter | |
| Fabricantes | Cirrus Logic | |
| Logotipo |  |
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CS8421
32-bit, 192 kHz Asynchronous Sample Rate Converter
Features
z 175 dB Dynamic Range
z –140 dB THD+N
z No Programming Required
z No External Master Clock Required
z Supports Sample Rates up to 211 kHz
z Input/Output Sample Rate Ratios from 7.5:1
to 1:8
z Master Clock Support for 128 x fs, 256 x fs,
384 x fs, and 512 x fs (Master Mode)
z 16, 20, 24, or 32-bit Data I/O
z 32-bit Internal Signal Processing
z Dither Automatically Applied and Scaled to
Output Resolution
I
z Flexible 3-Wire Serial Digital Audio Input and
Output Ports
z Master and Slave Modes for Both Input and
Output
z Bypass Mode
z Time Division Multiplexing (TDM) Mode
z Attenuates Clock Jitter
z Multiple Part Outputs are Phase Matched
z Linear Phase FIR Filter
z Automatic Soft Mute/Unmute
z +2.5 V Digital Supply (VD)
z +3.3 V or 5.0 V Digital Interface (VL)
z Space Saving 20-pin TSSOP and QFN
Packages
RST
Level Translators
BYPASS
SDIN
ISCLK
ILRCK
Serial
Audio
Data
Input
Sync Info
Time
Varying
Digital
Filters
Data
Sync Info
MS_SEL
SAIF
SAOF
Serial
Port
Mode
Decoder
Digital
PLL
3.3 V or 5.0 V (VL)
2.5 V (VD) GND
Serial
Data Audio
Output
Clock
Generator
XTI XTO
TDM_IN
SDOUT
OSCLK
OLRCK
SRC_UNLOCK
MCLK_OUT
Preliminary Product Information
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
http://www.cirrus.com
Copyright © Cirrus Logic, Inc. 2005
(All Rights Reserved)
JAN ‘05
DS641PP1
1
1 page  
CS8421
1. CHARACTERISTICS AND SPECIFICATIONS
(All Min/Max characteristics and specifications are guaranteed over the Specified Operating Conditions.
Typical performance characteristics and specifications are derived from measurements taken at nominal
supply voltages and TA = 25°C.)
SPECIFIED OPERATING CONDITIONS (GND = 0 V, all voltages with respect to 0 V)
Parameter
Power Supply Voltage
Ambient Operating Temperature:
Symbol
VD
VL
‘-CZ’
‘-CNZ’
‘-DZ’
TA
Min
2.38
3.14
-10
-10
-40
Nominal
2.5
3.3 or 5.0
-
-
-
Max
2.62
5.25
+70
+70
+85
Units
V
V
°C
°C
°C
ABSOLUTE MAXIMUM RATINGS (GND = 0 V; all voltages with respect to 0 V. Operation beyond
these limits may result in permanent damage to the device. Normal operation is not guaranteed at these extremes.)
Parameter
Power Supply Voltage
Input Current, Any Pin Except Supplies
Input Voltage
Ambient Operating Temperature (power applied)
Storage Temperature
(Note 1)
Symbol
VD
VL
Iin
Vin
TA
Tstg
Min
-0.3
-0.3
-
-0.3
-55
-65
Max
3.5
6.0
±10
VL+0.4
+125
+150
Units
V
V
mA
V
°C
°C
Notes: 1. Transient currents of up to 100 mA will not cause SCR latch-up.
2. Numbers separated by a colon indicate input and output sample rates. For example, 48 kHz:96 kHz
indicates that Fsi = 48 khz and Fso = 96 kHz.
DS641PP1
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5 Page 
CS8421
+2.5 V
+3.3 V or +5.0 V
0.1 µF
Serial
Audio
Source
VD
ILRCK
ISCLK
SDIN
TDM_IN
VL
OLRCK
OSCLK
SDOUT
0.1 µF
Serial
Audio
Input
Device
1 kΩ *
**
MS_SEL CS8421
SAIF
SAOF
SRC_UNLOCK
BYPASS
RST
GND GND
XTI
Hardware Control
Settings
Figure 6. Typical Connection Diagram, No External Master Clock
* When no external master clock is supplied to the part, both input and output must be set to salve mode
for the part to operate properly. This is done by connecting the MS_SEL pin to ground through a resis-
tance of 0Ω to 1 kΩ ± 1% as stated in Table 1, “Serial Audio Port Master/Slave and Clock Ratio Select
Startup Options (MS_SEL),” on page 13
** The connection (VL or GND) and value of these two resistors determines the mode of operation for the
input and output serial ports as described in Table 1, “Serial Audio Port Master/Slave and Clock Ratio
Select Startup Options (MS_SEL)", Table 2, “Serial Audio Input Port Startup Options (SAIF)", and
Table 3, “Serial Audio Output Port Startup Options (SAOF)", all on page 13.
DS641PP1
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet CDB8421.PDF ] | |
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