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HIP5062 PDF даташит

Спецификация HIP5062 изготовлена ​​​​«Intersil Corporation» и имеет функцию, называемую «Power Control IC Single Chip Dual Switching Power Supply».

Детали детали

Номер произв HIP5062
Описание Power Control IC Single Chip Dual Switching Power Supply
Производители Intersil Corporation
логотип Intersil Corporation логотип 

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HIP5062 Даташит, Описание, Даташиты
HIP5062
®
No ROeBcSomOLmEeTnEdePdRROeDpUlaCcTement
August 1998
File Number 3208.2
Power Control IC Single Chip Dual Switch-
ing Power Supply
The HIP5062 is a complete power control IC, incorporating
two high power DMOS transistors, CMOS logic and two low
level analog control circuits on the same Intelligent Power
IC. Both the standard “Boost” and the “SEPIC” (Single-
Ended Primary Inductance Converter) power supply
topologies are easily implemented with this single control IC.
Special power transistor current sensing circuitry is
incorporated that minimizes losses due to the monitoring
circuitry. Moreover, over-temperature and over-voltage
detection circuitry is incorporated within the IC to monitor the
chip temperature and the actual power supply output
voltage. These circuits can disable the drive to the power
transistor to protect both the transistor and, most
importantly, the load from over-voltage.
As a result of the power DMOS transistor’s current and
voltage capability (5A and 60V), multiple output power
supplies with total output power capability up to 100W are
possible.
Features
• Two Current Mode Control Regulators
• Two 60V, 5A On-chip DMOS Transistors
• Thermal Protection
• Over-Voltage Protection
• Over-Current Protection
• 1MHz Operation or External Clock
• Synchronization Output
• On-Chip Reference Voltage - 5.1V
• Output Rise and Fall Times ~ 3ns
• Designed for 26V to 42V Operation
Applications
• Single Chip Power Supplies
• Current Mode PWM Applications
• Distributed Power Supplies
• Multiple Output Converters
Ordering Information
PART NUMBER
HIP5062DY
HIP5062DW
TEMPERATURE
RANGE
0oC to +85oC
0oC to +85oC
PACKAGE
40 Pad Chip
Wafer
Chip
V+ (40)
TMON (39)
IRFI2 (38)
IRFO2 (37)
VINP (36)
AGND (35)
DGND (34)
XCKS (33)
CKIN (32)
IRFI1 (31)
IRFO1 (30)
VCMP1 (29)
VTCN (28)
(8) VDDP2
(9) VCMP2
(10) PSOK
(11) VREG2
(12) FLTN
(13) PSEN
(14) SHRT
(15) SLRN
(16) SFST
(17) VDDD
(18) VDDA
(19) VREG1
(20) VDDP1
175 mils x 175 mils (4.44mm x 4.44mm)
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved









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HIP5062 Даташит, Описание, Даташиты
HIP5062
Simplified Block Diagram
VIN
5µH
0.66µF
11µH
4µH
0.1µF
1.0µF
4µH
VDDD
0.1µF
4.7
12V
15 0.88
µF µF
µH 0.1
µF
D2
VDDP2
V+
INTERNAL
S2
GATE
DRIVERS
POWER
SUPPLY
AND REF
VOLTAGE
VDDP1
GATE
DRIVERS
D1
VDDP1
4.0
0.1 µH
µF
1.0
µF
S1
511
681
DGND
VREG2
IRFO2
CONTROL Q
AND
LOGIC
CLOCK
Q CONTROL
AND
LOGIC
VREG1
IRFO1
IRFI1
IRFI2
VCMP1
VCMP2
VTCN
VINP
33
µF 5.1V
TYPICAL SEPIC CONFIGURATION
2









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HIP5062 Даташит, Описание, Даташиты
HIP5062
Absolute Maximum Ratings
Thermal Information
DC Supply Voltage, V+. . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 42V
DMOS Drain Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 60V
DMOS Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10A
DC Logic Supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 16V
Output Voltage, Logic Outputs . . . . . . . . . . . . . . . . . . . -0.3V to 16V
Input Voltage, Analog and Logic. . . . . . . . . . . . . . . . . . -0.3V to 16V
Operating Junction Temperature Range . . . . . . . . . .0oC to +110oC
Storage Temperature Range . . . . . . . . . . . . . . . . . -55oC to +150oC
Thermal Resistance
(Solder Mounted to . . . . . . . . . . . . . . . . . . . . . . . . .
3oC/θWJCMax
0.050” Thick Copper Heat Sink)
Maximum Junction Temperature. . . . . . . . . . . . . . . . . . . . . . +110oC
(Controlled By Thermal Shutdown Circuit)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Electrical Specifications V+ = 36V, Channels 1 and 2, TJ = 0oC to +110oC; Unless Otherwise Specified
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
DEVICE PARAMETERS
I+ Supply Current
V+ = 42V, PSEN = 12V
- 24.7 30
mA
VDDA
Internal Regulator Output
Voltage
VINP
Reference Voltage
RVINP
VINP Resistance
ERROR AMPLIFIERS
V+ = 30V to 42V, IOUT = 0mA 11.7 - 13.3
V+ = 30V to 42V, IOUT = 30mA
11.5
-
13.3
SLRN = 12V, IOUT = 0mA
11.5 - 13.3
VDDA = SLRN = 12V, IVINP = 0mA
5.01
5.1
5.19
VINP = 0
- 900 -
V
V
V
V
| VIO |
Input Offset Voltage
(REG - VINP)
IVCMP = 0mA
- - 10 mV
RIN VREG
gm (VREG)
gm (SFST)
IVCMP
Input Resistance to GND
VREG Transconductance
(IVCMP/(VREG - VINP)
SFST Transconductance
IVCMP/(VREG - SFST)
Maximum Source Current
Maximum Sink Current
VREG = 5.1V
39 - 85
VCMP = 1V to 8V, SFST = 11V
15
30
50
k
mS
VSFST < 4.9V
VREG = 4.95V, VCMP = 8V
VREG = 5.25V, VCMP = 0.4V
0.8
-2.5
0.75
- 6 mS
-
-0.75
mA
- 2.5 mA
OVTH
Over-Voltage Threshold
Voltage at VREG for FLTN to be
latched
6.05
-
6.5
V
CLOCK
fq
VTH CKIN
Internal Clock Frequency
External Clock Input Threshold
Voltages
XCKS = 12V, VDDD = 12V
0.9 1.0 1.1 MHz
33 - 66 %VDDD
DMOS TRANSISTORS
rDS(on)
Drain-Source On-State
Resistance
I Drain = 2.5A,
TJ = +25oC
VDDD
=
11V,
-
- 0.22
IDSS
Drain-Source Leakage Current Drain to Source Voltage = 60V
-
1 100 µA
CURRENT CONTROLED PWM
|VIO| VCMP
Buffer Offset Voltage (VCOMP -
VIFRO)
IFRO = 0mA to -5mA,
VTCN = 0.2V to 7.6V,
VCMP2 = 0.2V to 7.6V
- - 125 mV
3










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