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PDF NB6L16 Data sheet ( Hoja de datos )

Número de pieza NB6L16
Descripción 6GHz/6Gbps 2.5V/3.3V Multi-level Input to Differential Lvecl Clock or Data Translator/receiver/driver Buffer
Fabricantes ON Semiconductor 
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No Preview Available ! NB6L16 Hoja de datos, Descripción, Manual

N2DCRBw.ileuB5fo.fDcfV6ecfeaeLrk/teir1av3noS6e.trh3riea/VDDelatrML4itVUvaueP.lctrEoi/lmCTerLvae/LnlVsINnlapEtuCotLrtoThe NB6L16 is a high precision, low power ECL differential clock
wor data receiver/driver/translator buffer. The device is functionally
w equivalent to the EL16, EP16, LVEL16 and NBSG16 devices. With
output transition times of 70 ps, it is ideally suited for high frequency,
mlow power systems. The device is targeted for Backplane buffering,
oGbE clock/data distribution, Fibre Channel distribution and SONET
clock/data distribution applications.
.cInput accept LVNECL (Negative ECL), LVPECL (Positive ECL),
LVTTL, LVCMOS, CML, or LVDS. Outputs are 800 mV ECL
signals.
UThe VBB pin, an internally generated voltage supply, is available to
t4this device only. For single−ended input conditions, the unused
differential input is connected to VBB as a switching reference voltage.
VBB may also rebias AC coupled inputs. When used, decouple VBB
eand VCC via a 0.01 mF capacitor and limit current sourcing or sinking
eto 0.5 mA. When not used, VBB should be left open.
Maximum Input Clock Frequency w 6 GHz Typical
hMaximum Input Data Rate Frequency w 6 Gb/s Typical
SLow 12 mA Typical Power Supply Current
70 ps Typical Rise/Fall Times
ta130 ps Input Propagation Delay
On−Chip Reference for ECL Single−Ended Input − VBB Output
aPECL Mode Operating Range: VCC = 2.375 V to 3.465 V with
VEE = 0 V
.DNECL Mode Operating Range: VCC = 0 V
with VEE = −2.375 V to −3.465 V
Open Input Default State
wLVDS, LVPECL, LVNECL, LVCMOS, LVTTL and CML Input
ww et4U.comCompatible
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8
1
SOIC−8
D SUFFIX
CASE 751
MARKING DIAGRAMS*
8
6L16
ALYW
1
8
1
TSSOP−8
DT SUFFIX
CASE 948R
8
6L16
ALYW
1
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
Device
Package Shipping
NB6L16D
NB6L16DR2
SOIC−8
SOIC−8
98 Units/Rail
2600 /
Tape & Reel
NB6L16DT**
NB6L16DTR2**
TSSOP−8
TSSOP−8
100 Units/Rail
2500 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
**Future Product − Contact factory for availability.
www.DataSheSemiconductor Components Industries, LLC, 2004
1
Publication Order Number:
April, 2004 − Rev. 2
NB6L16/D

1 page




NB6L16 pdf
NB6L16
Table 5. DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 10)
−40°C
Symbol
Characteristic
Min Typ Max Min
IEE
Negative Power Supply Current (Note 11) 10
12 18
10
VOH Output HIGH Voltage (Note 12)
2150 2250 2350 2200
VOL Output LOW Voltage (Note 12)
1430 1550 1670 1480
DIFFERENTIAL INPUT DRIVEN SINGLE−ENDED (Figures 10, 12)
25°C
Typ
12
2300
1600
Max
18
2400
1720
Vth Input Threshold Reference Voltage
Range (Note 8)
1125
VCC 1125
−75
VCC
−75
VIH Single−Ended Input HIGH Voltage
Vth
+75
VCC
Vth
+75
VCC
VIL Single−Ended Input LOW Voltage
VEE
Vth VEE
−75
Vth
−75
VBB Output Voltage Reference
1880 1980 2070
DIFFERENTIAL INPUTS DRIVEN DIFFERENTIALLY (Figures 11, 13)
1880
1980 2070
VIHD
VILD
Differential Input HIGH Voltage
Differential Input LOW Voltage
1200
VEE
VCC
VCC
−75
1200
VEE
VCC
VCC
−75
VCMR
Input Common Mode Range
(Differential Cross−Point Voltage)
(Note 9)
1163
VCC 1163
−38
VCC
−38
VID Differential Input Voltage (VIHD − VILD)
75
2500 75
2500
IIH Input HIGH Current
D 50 150
D 10 150
50 150
10 150
IIL Input LOW Current
D −150 −5
D −150 −30
−150 −5
−150 −30
85°C
Min Typ Max
10 12 18
2250 2350 2450
1530 1650 1770
1125
Vth
+75
VEE
1880
VCC
−75
VCC
Vth
−75
1980 2070
1200
VEE
1163
VCC
VCC
−75
VCC
−38
75
−150
−150
2500
50 150
10 150
−5
−30
Unit
mA
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
8. Vth is applied to the complementary input when operating in single−ended mode.
9. VCMR minimum varies 1:1 with VEE, VCMR maximum varies 1:1 with VCC.
10. Input and output parameters vary 1:1 with VCC. VEE can vary +0.925 V to −0.5 V.
11. All input and output pins left open.
12. All loading with 50 W to VCC − 2.0 V.
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NB6L16 arduino
NB6L16
PACKAGE DIMENSIONS
−X−
A
SOIC−8
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751−07
ISSUE AB
B
−Y−
−Z−
H
85
S 0.25 (0.010) M Y M
1
4
K
G
D
C
SEATING
PLANE
N X 45 _
0.10 (0.004)
M
0.25 (0.010) M Z Y S X S
J
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
MILLIMETERS
INCHES
DIM MIN MAX MIN MAX
A 4.80 5.00 0.189 0.197
B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.053 0.069
D 0.33 0.51 0.013 0.020
G 1.27 BSC 0.050 BSC
H 0.10 0.25 0.004 0.010
J 0.19 0.25 0.007 0.010
K 0.40 1.27 0.016 0.050
M 0_ 8_ 0_ 8_
N 0.25 0.50 0.010 0.020
S 5.80 6.20 0.228 0.244
7.0
0.275
1.52
0.060
4.0
0.155
0.6
0.024
SOIC−8
1.270
0.050
ǒ ǓSCALE 6:1
mm
inches
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