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Número de pieza S1D13806
Descripción LCD Controller
Fabricantes Epson Electronics 
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.DataSheet4U.comS1D13806 Embedded Memory Display Controller
wwSTwE1DC1H3N8I0C6AL MANUAL et4U.comDocument Number: X28B-Q-001-05
www.DataShe .comCopyright © 2001 Epson Research and Development, Inc. All Rights Reserved.
t4UInformation in this document is subject to change without notice. You may download and use this document, but only for your own use in
eevaluating Seiko Epson/EPSON products. You may not modify the document. Epson Research and Development, Inc. disclaims any
erepresentation that the contents of this document are accurate or current. The Programs/Technologies described in this document may contain
hmaterial protected under U.S. and/or International Patent laws.
www.DataSEPSON is a registered trademark of Seiko Epson Corporation. All other trademarks are the property of their respective owners.

1 page




S1D13806 pdf
ENERGY
S AV I N G
EPSON
GRAPHICS
S1D13806
S1D13806 Embedded Memory Display Controller
March 2002
The S1D13806 is a highly integrated color LCD/CRT/TV graphics controller with embedded memory supporting a
wide range of CPUs and display devices. The S1D13806 architecture is designed to meet the low cost, low power
requirements of the embedded markets, such as Mobile Communications, Hand-Held PC’s, and Office Automation.
The S1D13806 supports multiple CPUs, all LCD panel types, CRT, TV, and additionally provides a number of
differentiating features. EPSON Independent Simultaneous Display technology allows the user to configure two
different images on two different displays, while the SwivelView™, Hardware Cursor, Ink Layer, and BitBLT features
offer substantial performance benefits. Products requiring digital camera input can take advantage of the directly
supported WINNOV Videum® Cam digital interface. These features, combined with the S1D13806’s Operating
System independence, make it an ideal display solution for a wide variety of applications.
FEATURES
1280K bytes of embedded synchronous DRAM.
Multiple CPU interface support.
Resolutions up to:
800x600 at a color depth of 16 bpp.
1024x768 at a color depth of 8 bpp.
Display Support for:
4/8/16-bit passive panels.
9/12/18/2x9/2x12 TFT/D-TFD panels.
CRT.
NTSC and PAL TV Output.
WINNOV Videum® Cam digital camera interface.
SwivelView: 90°, 180°, 270°
hardware rotation of displayed
image.
EPSON Independent Simultaneous Display:
displays different images on different displays.
Virtual Display Support
Hardware Cursor or full screen Ink Layer.
2D BitBLT Engine.
Software initiated Power Save Mode.
Operating System Independent.
SYSTEM BLOCK DIAGRAM
CPU
MediaPlug
Interface
Control
Clock
S1D13806
Analog Out
Digital Out
TV
or
CRT
FLAT PANEL
X28B-C-001-09
1

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S1D13806 arduino
Epson Research and Development
Vancouver Design Center
Page 5
8.4.8 CRT/TV Configuration Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
8.4.9 CRT/TV Display Mode Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
8.4.10 LCD Ink/Cursor Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
8.4.11 CRT/TV Ink/Cursor Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
8.4.12 BitBLT Configuration Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . 135
8.4.13 Look-Up Table Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
8.4.14 Power Save Configuration Registers . . . . . . . . . . . . . . . . . . . . . . . . . 144
8.4.15 Miscellaneous Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146
8.4.16 Common Display Mode Register . . . . . . . . . . . . . . . . . . . . . . . . . . . 147
8.5 MediaPlug Registers Descriptions . . . . . . . . . . . . . . . . . . . . . . 148
8.5.1 MediaPlug Control Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148
8.5.2 MediaPlug Data Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152
8.6 BitBLT Data Registers Descriptions . . . . . . . . . . . . . . . . . . . . . . 152
9 2D BitBLT Engine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153
9.1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153
9.2 BitBLT Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153
10 Display Buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154
10.1 Image Buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155
10.2 Ink Layer/Hardware Cursor Buffers . . . . . . . . . . . . . . . . . . . . . . 155
10.3 Dual Panel Buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 155
11 Display Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 156
11.1 Display Mode Data Format . . . . . . . . . . . . . . . . . . . . . . . . . 156
11.2 Image Manipulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157
12 Look-Up Table Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158
12.1 Monochrome Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158
12.2 Color Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160
13 TV Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162
13.1 NTSC/PAL Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . 162
13.2 Clock Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162
13.3 Filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163
13.3.1 Chrominance Filter (REG[05Bh] bit 5) . . . . . . . . . . . . . . . . . . . . . . . . 163
13.3.2 Luminance Filter (REG[05Bh] bit 4) . . . . . . . . . . . . . . . . . . . . . . . . . 163
13.3.3 Anti-flicker Filter (REG[1FCh] bits [2:1]) . . . . . . . . . . . . . . . . . . . . . . 163
13.4 TV Output Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164
13.4.1 TV Image Display and Positioning . . . . . . . . . . . . . . . . . . . . . . . . . . 167
13.4.2 TV Cursor Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169
14 Ink Layer/Hardware Cursor Architecture . . . . . . . . . . . . . . . . . . . . . . . 170
14.1 Ink Layer/Hardware Cursor Buffers . . . . . . . . . . . . . . . . . . . . . . 170
14.2 Ink/Cursor Data Format . . . . . . . . . . . . . . . . . . . . . . . . . . 171
Hardware Functional Specification
Issue Date: 02/10/04
S1D13806
X28B-A-001-13

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