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PDF NHI-15392RT Data sheet ( Hoja de datos )

Número de pieza NHI-15392RT
Descripción (NHI Series) Multi-Protocol Data Bus Interface
Fabricantes National Hybrid 
Logotipo National Hybrid Logotipo



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No Preview Available ! NHI-15392RT Hoja de datos, Descripción, Manual

www.DaNtaMSAhueNTlettiH4I-UPOi-.crRRo.oNmDTetUomAascEoeoxtLtralpe'sDaSHTnaMhetdYaareenmBdBueiunaRMtsla4elIIsUnmDteo.,crrfyIoancmec.Version 2000.11.29
w November 2000
ww mThe information provided in this document is believed to be accurate; however, no responsibility is assumed by NATIONAL
oHYBRID, INC. for its use, and no license or rights are granted by implication or otherwise in connection therewith. Specifications
.care subject to change without notice.
t4U2200 Smithtown Avenue, Ronkonkoma, NY 11779
eeTelephone (631) 981- 2400 Data Bus Fax (631) 981- 2445
www.DataShWebsite http: //www.nationalhybrid.com

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NHI-15392RT pdf
1.0.0
SCOPE
This document defines the functional and electrical specification for National Hybrid's
series of MIL- STD- Data Bus Expanded Memory Remote Terminals (NHi- RT).
2.0.0
NHi-RT PROTOCOL COMPLIANCE
MIL- STD- 1553A
MIL- STD- 1553B Notices I and II
MIL- STD- 1760B
MCAIR MDC A3818, A5690, A4905, A5332
EFA/ STANAG- 3838 requirements for Eurofighter Aircraft
3.0.0
INTRODUCTION
The NHi- RT is a low cost complete Multi-Protocol Mil- Std- Data Bus Interface between a dual
redundant bus and a host processor. The device functions as a programmable Remote Terminal
containing a protocol chip, two +5V monolithic transceivers and 16K word SRAM. The unit is
available packaged in a 1.1" x 1.1" 69 pin ceramic PGA, or 1.1" x 1.1" 68 pin ceramic quad
flatpack. The only external components required are two coupling transformers.
The NHi- RT appears to the host computer as 16K words of 16 bit wide memory controlled by
standard RAM signals. The device can thus be easily interfaced with all popular processors and
buses. The built in interrupt controller supports an internal FIFO which retains header information
for queuing up to 6 pending interrupt requests plus an overflow interrupt.
All modes of operation access data tables via pointers residing in RAM which facilitates multiple
buffering. This allows buffers to change without moving data and promotes efficient use of RAM
space. The data tables have programmable sizes and locations.
The NHi-RT is plug in compatible with the popular NHi-ET full function family and the 4K word
remote terminal family with no changes to hardware or software required.
3.1.0
FEATURES
The NHi- RT 16K word family is form, fit, and function compatible to all the NHi- data bus
interface parts. This interchange ability gives the user a high degree of flexibility when configuring
a system around the NHi family of parts.
3.1.1
GENERAL FEATURES
Mulit-Protocol Interface
Single +5 volt supply.
Operates from 10 Mhz clock.
Contains two monolithic +5V transceivers
Appears to host as a Dual Port Double Buffered 16K x 16 SRAM
Footprint less than 1.00 square inches
Ensures integrity of all shared data and control structures
Built- in interrupt controller
Internal FIFO is configurable to retain header information for queuing up to 6 pending interrupt
requests plus an overflow interrupt, or as a 7 interrupt revolving FIFO
Provides interrupt priority input and output pins for daisy- chaining interrupt requests
Contains a Timer Unit which provides 32 bit RTC (Real- Time- Clock) with 1, 2, 4, 8, 16, 32 and
64 uS internal, or user provided external clock resolution for data and event time tagging.
Interfaces with an 8 bit discrete I/ O bus
Selectable 768/ 672 us Failsafe Timer with complete Testability
Low power CMOS technology
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NHI-15392RT arduino
The address must be wired using pull- up and pull- down resistors. There are 64K internal pull- up
resistors in the protocol chip, so only external pull- down resistors of 4.7K are required. The
Hardwire Address is read and loaded into the terminal at Power- On Reset, Hardware Reset, and
Software Reset.
The terminal address can be changed at any time through software by writing a new address to
the Basic Status Register, however, if any of the above resets occur, the Hardwire Address will
be re- loaded into the terminal. The software address can be locked out by setting Bit2 in
Configuration Register 1.
4.0.0
DATA STRUCTURE
4.1.0
ADDRESS MAP
The NHi- RT appears to the host as 16K words of memory divided into the following blocks:
ADDRESS RANGE
0 -- 30
31
32 -- 35
64 -- 16383
DESCRIPTION
INTERNAL REGISTERS
I/O TAG WORD
I/O SPACE
SHARED RAM
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