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WJLXT972A PDF даташит

Спецификация WJLXT972A изготовлена ​​​​«Intel» и имеет функцию, называемую «Single-Port 10/100 Mbps PHY Transceiver».

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Номер произв WJLXT972A
Описание Single-Port 10/100 Mbps PHY Transceiver
Производители Intel
логотип Intel логотип 

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WJLXT972A Даташит, Описание, Даташиты
U.com®
taShIPenHetteY4l TLraXnTs9c7e2iAveSr ingle-Port 10/100 MbpsDatasheet
.Da The Intel® LXT972A Single-Port 10/100 Mbps PHY Transceiver (called hereafter the
w LXT972A Transceiver) directly supports both 100BASE-TX and 10BASE-T applications. The
w LXT972A Transceiver is IEEE compliant and provides a Media Independent Interface (MII) for
easy attachment to 10/100 Media Access Controllers (MACs). The LXT972A Transceiver
w supports full-duplex operation at 10 Mbps and 100 Mbps. Operating conditions for the
mLXT972A Transceiver can be set using auto-negotiation, parallel detection, or manual control.
The LXT972A Transceiver is fabricated with an advanced CMOS process and requires only a
osingle 2.53.3 V power supply with 2.5 V MII interface support.
.cApplications
Combination 10BASE-T/100BASE-TX
UNetwork Interface Cards (NICs)
Network printers
10/100 Personal Computer Memory Card
International Association (PCMCIA) cards
Cable Modems and Set-Top Boxes
t4Product Features
e3.3 V Operation
eLow power consumption (300 mW typical)
h10BASE-T and 100BASE-TX using a
single RJ-45 connection
IEEE 802.3-compliant 10BASE-T or
S100BASE-TX ports with integrated filters
taAuto-negotiation and parallel detection
MII interface with extended register
capability
aRobust baseline wander correction
Carrier Sense Multiple Access / Collision
Detection (CSMA/CD) or full-duplex
operation
JTAG boundary scan
MDIO serial port or hardware pin
configurable
Integrated, programmable LED drivers
64-Pin Low-profile Quad Flat Package
(LQFP)
— LXT972ALC - Commercial (0° to 70 °C
ambient)
www.D .DataSheet4U.comDocument Number: 249186-004
www Revision Date: 25-Oct-2005









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WJLXT972A Даташит, Описание, Даташиты
Intel® LXT972A Single-Port 10/100 Mbps PHY Transceiver
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY
ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN
INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS
ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES
RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER
INTELLECTUAL PROPERTY RIGHT.
Intel products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications.
Intel may make changes to specifications and product descriptions at any time, without notice.
The Intel® LXT971A Single-Port 10/100 Mbps PHY Transceiver may contain design defects or errors known as errata which may cause the product to
deviate from published specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling
1-800-548-4725 or by visiting Intel's website at http://www.intel.com.
Intel and the Intel logo are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries.
*Other names and brands may be claimed as the property of others.
Copyright © 2005, Intel Corporation.
2 Datasheet
Document Number: 249186-004
Revision Date: 25-Oct-2005









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WJLXT972A Даташит, Описание, Даташиты
Intel® LXT972A Single-Port 10/100 Mbps PHY Transceiver
Contents
1.0 Introduction to This Document ......................................................................................... 11
1.1 Document Overview ............................................................................................11
1.2 Related Documents............................................................................................. 11
2.0 Block Diagram for Intel® LXT972A Transceiver ............................................................... 12
3.0 Pin Assignments for Intel® LXT972A Transceiver............................................................ 13
4.0 Signal Descriptions for Intel® LXT972A Transceiver........................................................ 16
5.0 Functional Description...................................................................................................... 23
5.1 Device Overview .................................................................................................24
5.1.1 Comprehensive Functionality ................................................................. 24
5.1.2 Optimal Signal Processing Architecture ................................................. 24
5.2 Network Media / Protocol Support.......................................................................25
5.2.1 10/100 Network Interface .......................................................................25
5.2.2 MII Data Interface ................................................................................... 27
5.2.3 Configuration Management Interface ..................................................... 27
5.3 Operating Requirements .....................................................................................30
5.3.1 Power Requirements ..............................................................................30
5.3.2 Clock Requirements ............................................................................... 30
5.4 Initialization.......................................................................................................... 31
5.4.1 MDIO Control Mode and Hardware Control Mode .................................33
5.4.2 Reduced-Power Modes .......................................................................... 33
5.4.3 Reset for Intel® LXT972A Transceiver ................................................... 34
5.4.4 Hardware Configuration Settings ...........................................................35
5.5 Establishing Link .................................................................................................36
5.5.1 Auto-Negotiation.....................................................................................36
5.5.2 Parallel Detection ................................................................................... 37
5.6 MII Operation....................................................................................................... 38
5.6.1 MII Clocks............................................................................................... 39
5.6.2 Transmit Enable .....................................................................................40
5.6.3 Receive Data Valid ................................................................................. 40
5.6.4 Carrier Sense ......................................................................................... 41
5.6.5 Error Signals........................................................................................... 41
5.6.6 Collision .................................................................................................. 41
5.6.7 Loopback................................................................................................ 42
5.7 100 Mbps Operation ............................................................................................43
5.7.1 100BASE-X Network Operations ...........................................................43
5.7.2 Collision Indication ................................................................................. 46
5.7.3 100BASE-X Protocol Sublayer Operations ............................................ 47
5.8 10 Mbps Operation.............................................................................................. 52
5.8.1 10BASE-T Preamble Handling ............................................................... 52
5.8.2 10BASE-T Carrier Sense .......................................................................52
5.8.3 10BASE-T Dribble Bits ........................................................................... 52
5.8.4 10BASE-T Link Integrity Test ................................................................. 53
5.8.5 Link Failure ............................................................................................. 53
Datasheet
Document Number: 249186-004
Revision Date: 25-Oct-2005
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Номер в каталогеОписаниеПроизводители
WJLXT972ASingle-Port 10/100 Mbps PHY TransceiverIntel
Intel
WJLXT972MSingle-Port 10/100 Mbps PHY TransceiverIntel
Intel

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