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PDF NP42B1ME01 Data sheet ( Hoja de datos )

Número de pieza NP42B1ME01
Descripción COSMOPLASMA
Fabricantes NEC 
Logotipo NEC Logotipo



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DATA SHEET
Preliminary
COLOR PLASMA DISPLAY MODULE
NP42B1ME01
COSMOPLASMA
106 cm (42 type), Wide screen (853 x 480 Pixels)
Digital RGB signal, 8bits signal each
DESCRIPTION
The NP42B1ME01 is a 42-inch wide color plasma display module with a power supply. And its
resolution is 853(H)x480(V) pixels. The display offers vibrant colors we reproduced in a thin and low
profile package. This device uses AC plasma technology by NEC and includes an 8-bit of digital video
signal interface for each RGB color.
mFEATURES
o• Applied Capsulated Color Filter (CCF) technology, developed at NEC, which offers a high quality
.cimage match for CRT display. To offer remarkably pure colors, the color plasma display panel
uses extremely clear, thin capsulated color filters to cut unnecessary light as the plasma
discharges.
U• Peak luminance of 550cd/m2 (typical value) is achieved through a new driving method, which offers
extremely vivid image with good contrast.
t4• Applied Peak Luminance Enhancement (PLE) function that enables the display to operate with the
ideal contrast. The PLE function makes it possible to adjust the average luminance level of the
ePDP display automatically in accordance with the average luminance level of an input video
signal.
eAPPLICATIONS
h• Wide Screen TV (aspect ratio 16:9)
• Public Information Display
S• Video Conference Systems
ta• Retail
www.Da• Education and Training Systems
www.DataSheet4U.comThe information in this document is subject to change without notice.

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NP42B1ME01 pdf
Table4 Electrical Characteristics of Input signal for power supply control
Item
Symbol MIN TYP. MAX Unit
Remarks
High Level Input Voltage VIH 3 - - V
Low Level Input Voltage VIL - - 0.5 V
High Level Input Current IIH
- - 0.9 mA
Low Level Input Current
IIL
----
VI=5V
4) Output Signal for Power Supply control
P-fail: Detection signal of AC Input voltage OFF and Vaux Output OFF.
When AC Input voltage is OFF or Vaux Output is OFF, P-fail turns to “L” level.
Table5
Item
High Level Output Voltage
Low Level Output Voltage
Electrical Characteristics of Output Signal
Symbol MIN. TYP. MAX. Unit
VOH 2.5 - -
V
VOL - - 0.45 V
Remarks
IOH=-200uA
IOL=1mA
5) POWER SUPPLY ON / OFF SEQUENCE
Refer to the Input-voltage and Output-power sequence on the following page.
Note1: When the panel is broken or the PDP module has abnormal operation, the ALARM signal
turns to “L” level. However, the ALARM signal is also “L” level before Power-On. Please
notice the above issue if ALARM signal will be detected and used for other control in
video signal processing circuit
Note2: When the ALARM signal turns to “L” level, power supply shutdowns the high voltage
outputs. After the ALARM signal turns to “L” level, PSM signal can not re-start the
Power-supply. In this case, AC power should be re-started from the initial operation step.
Note3: In case of power-service momentary interruption is within 20ms, P-fail signal does not be
output. But in case of power-service momentary interruption is over 20ms, P-fail signal
will be output. And then the voltages that are supplied to the PDP module would
decrease. Therefore, the PDP module will output the ALARM signal and stop the
operation of the Power-supply.
(Please refer to AC Input OFF sequence in regard to stop the operation of the Power-
supply.)

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NP42B1ME01 arduino
Set-up of control mode signals and display position
LE
200 nsec min.
1000 nsec min.
SCK
12 3 456 789
10 nsec min. 10 nsec min.
SDATA
D0 D1 D2 D3 D4 D5 D6 D7 D8
200 nsec min.
45 46 47 48
D44 D45 D46 D47
Set-up Sequence:
1. Set LE to “L” level.
2. Enter the 48 bits of SDATA into the module synchronizing to the serial crock signal (SCK)
3. Set LE to “H” level.
Note 1: SCK clock rate: 1MHz max.
Note 2: Serial input data should be refreshed at leased in every 5 or 6 seconds or less.
Note 3: Entered serial data (SDATA) becomes effective the falling edge of the VSYNC signal while LE
signal is “H” level. When VSYNC signal is overlapped with the “L” period of LE signal, the
serial data becomes effective at the falling edge of the VSYNC signal after LE signal becomes
“H” level.
Note 4: When only 48 SCK clocks are entered while LE is “L” level period, SDATA become enable, If
SCK clocks number is not 48, SDATA is not refreshed.
Note 5: When powers are supplied to the module, serial data in the module has vague status.
Therefore serial data should be refreshed after powered on.

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