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74C192 PDF даташит

Спецификация 74C192 изготовлена ​​​​«ETC» и имеет функцию, называемую « MM74C192».

Детали детали

Номер произв 74C192
Описание MM74C192
Производители ETC
логотип ETC логотип 

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74C192 Даташит, Описание, Даташиты
January 1991
Revised October 1999
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MM74C192 • MM74C193
Synchronous 4-Bit Up/Down Decade Counter •
Synchronous 4-Bit Up/Down Binary Counter
General Description
The MM74C192 and MM74C193 up/down counters are
monolithic complementary MOS (CMOS) integrated cir-
cuits. The MM74C192 is a BCD counter, while the
MM74C193 is a binary counter.
Counting up and counting down is performed by two count
inputs, one being held high while the other is clocked. The
outputs change on the positive-going transition of this
clock.
These counters feature preset inputs that are set when
load is a logical “0” and a clear which forces all outputs to
“0” when it is at a logical “1”. The counters also have carry
and borrow outputs so that they can be cascaded using no
external circuitry.
Features
s High noise margin: 1V guaranteed
s Tenth power TTL compatible: Drive 2 LPTTL loads
s Wide supply range: 3V to 15V
s Carry and borrow outputs for N-bit cascading
s Asynchronous clear
s High noise immunity: 0.45 VCC (typ.)
Ordering Code:
Order Number Package Number
Package Description
MM74C192N
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
MM74C193M
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
MM74C193N
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagram
Top View
© 1999 Fairchild Semiconductor Corporation DS005901
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74C192 Даташит, Описание, Даташиты
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Absolute Maximum Ratings(Note 1)
Voltage at Any Pin
Operating Temperature Range (TA)
Storage Temperature Range (TS)
Maximum VCC Voltage
Power Dissipation (PD)
Dual-In-Line
Small Outline
Operating VCC Range
Lead Temperature (TA)
(Soldering, 10 seconds)
0.3V to VCC + 0.3V
40°C to +85°C
65°C to +150°C
18V
700 mW
500 mW
3V to 15V
260°C
Note 1: “Absolute Maximum Ratings” are those values beyond which the
safety of the device cannot be guaranteed. Except for “Operating Tempera-
ture Range” they are not meant to imply that the devices should be oper-
ated at these limits. The Electrical Characteristics table provides conditions
for actual device operation.
DC Electrical Characteristics
Min/Max limits apply across temperature range unless otherwise noted
Symbol
Parameter
Conditions
CMOS TO CMOS
VIN(1)
Logical “1” Input Voltage
VIN(0)
Logical “0” Input Voltage
VOUT(1)
Logical “1” Output Voltage
VOUT(0)
Logical “0” Output Voltage
IIN(1)
Logical “1” Input Current
IIN(0)
Logical “0” Input Current
ICC Supply Current
CMOS TO LPTTL INTERFACE
VCC = 5V
VCC = 10V
VCC = 5V
VCC = 10V
VCC = 5V, IO = −10 µA
VCC = 10V, IO = −10 µA
VCC = 5V, IO = 10 µA
VCC = 10V, IO = 10 µA
VCC = 15V, VIN = 15V
VCC = 15V, VIN = 0V
VCC = 15V
VIN(1)
Logical “1” Input Voltage
VCC = 4.75V
VIN(0)
Logical “0” Input Voltage
VCC = 4.75V
VOUT(1)
Logical “1” Output Voltage
VCC = 4.75V, IO = −100 µA
VOUT(0)
Logical “0” Output Voltage
VCC = 4.75V, IO = 360 µA
OUTPUT DRIVE (See Family Characteristics Data Sheet) (Short Circuit Current)
ISOURCE Output Source Current
ISOURCE Output Source Current
ISINK
Output Sink Current
ISINK
Output Sink Current
VCC = 5V, VIN(0) = 0V
TA = 25°C, VOUT = 0V
VCC = 10V, VIN(0) = 0V
TA = 25°C, VOUT = 0V
VCC = 5V, VIN(1) = 5V
TA = 25°C, VOUT = VCC
VCC = 10V, VIN(1) = 10V
TA = 25°C, VOUT = VCC
Min Typ
3.5
8.0
4.5
9.0
1.0
0.005
0.005
0.05
VCC 1.5
2.4
1.75
8
1.75
8
Max
1.5
2.0
0.5
1.0
1.0
300
0.8
0.4
Units
V
V
V
V
V
V
V
V
µA
µA
µA
V
V
V
V
mA
mA
mA
mA
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74C192 Даташит, Описание, Даташиты
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AC Electrical Characteristics (Note 2)
TA = 25°C, CL = 50 pF, unless otherwise noted
Symbol
Parameter
Conditions
Min Typ Max
tpd Propagation Delay
VCC = 5V
Time to Q from Count Up or Down
VCC = 10V
tpd Propagation Delay
VCC = 5V
250 400
100 160
120 200
Time to Q Borrow from Count Down
VCC = 10V
tpd Propagation Delay
VCC = 5V
Time to Carry from Count Up
VCC = 10V
50 80
120 200
50 80
tS Time Prior to Load
VCC = 5V
100 160
that Data Must be Present
tW Minimum Clear Pulse Width
VCC = 10V
VCC = 5V
VCC = 10V
30 50
300 480
120 190
tW
tpd0
tpd1
tW
fMAX
tr
tf
CIN
Minimum Load Pulse Width
Propagation Delay
Time to Q from Load
Minimum Count Pulse Width
Maximum Count Frequency
Count Rise and Fall Time
Input Capacitance
VCC = 5V
VCC = 10V
VCC = 5V
VCC = 10V
VCC = 5V
VCC = 10V
VCC = 5V
VCC = 10V
VCC = 5V
VCC = 10V
(Note 3)
100 160
40 65
300 480
120 190
120 200
35 80
2.5 4
6 10
15
5
5
CPD Power Dissipation Capacitance
(Note 4)
100
Note 2: AC Parameters are guaranteed by DC correlated testing.
Note 3: Capacitance is guaranteed by periodic testing.
Note 4: CPD determines the no load AC power consumption of any CMOS device. For complete explanation, see Application Note AN-90.
Cascading Packages
Guaranteed Noise Margin
as a Function of VCC
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
µs
µs
pF
pF
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Номер в каталогеОписаниеПроизводители
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