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CA3282 PDF даташит

Спецификация CA3282 изготовлена ​​​​«Intersil Corporation» и имеет функцию, называемую «Octal Low Side Power Driver with Serial Bus Control».

Детали детали

Номер произв CA3282
Описание Octal Low Side Power Driver with Serial Bus Control
Производители Intersil Corporation
логотип Intersil Corporation логотип 

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CA3282 Даташит, Описание, Даташиты
TM CA3282
June 1998
Octal Low Side Power Driver
with Serial Bus Control
Features
Description
• Output Current Drive Capability
The CA3282 is a logic controlled, eight channel octal power
- All Outputs ON, Equal . . . . . . . . . . . . . . 0.625A Each
- Per Output Individually . . . . . . . . . . . . . . . . . 1A Each
- Maximum Total of Outputs ON . . . . . . . . . . . . . . . . 5A
driven. The serial peripheral interface (SPI) utilized by the
CA3282 is a serial synchronous bus compatible with Intersil
CDP68HC05, or equivalent, microcomputers. As shown in
the Block Diagram for the CA3282 each of the open drain
• High Voltage Power BiMOS Outputs
- 8 Open Drain NDMOS Drivers
m- Individual Output Latch
- Over-Current Limit Protection . . . . . . . . . . . . . 1.05A
o- Over-Voltage Clamp Protection . . . . . . . . . . . . . . 30V
.c• High Speed CMOS Logic Control
- Low Quiescent IDD Current . . . . . . . . . . . . . . . . . 5mA
U- SPI Bus Controlled Interface
- Individual Fault Unlatch and Feedback
t4- Common Reset Line
• Operating Temperature Range . . . . . . . -40oC to 125oC
eeApplications
h• Automotive and Industrial Systems
• Solenoids, Relays and Lamp Drivers
S• Logic and µP Controlled Drivers
ta• Robotic Controls
NDMOS output drivers has individual protection for over-
voltage and over-current. Each output channel has separate
output latch control with fault unlatch and diagnostic feed-
back. Under normal ON conditions, each output driver is in a
low, saturation state. Comparators in the diagnostic circuitry
monitor the output drivers to determine if an out of saturation
condition exists. If a comparator senses a fault, the respec-
tive output driver is unlatched. In addition, over current pro-
tection is provided with current limiting in each output,
independent of the diagnostic feedback loop.
The CA3282 is fabricated in a Power BiMOS IC process, and is
intended for use in automotive and other applications having a
wide range of temperature and electrical stress conditions. It is
particularly suited for driving lamps, relays, and solenoids in
applications where low operating power, high breakdown volt-
age, and high output current at high temperatures is required.
The CA3282 is supplied in 15 lead plastic SIP package with
lead forms for either vertical or surface mount.
Ordering Information
PART
NUMBER
TEMP.
RANGE(oC)
PACKAGE AND
LEAD FORM
PKG
NO.
a CA3282AS1
.D CA3282AS2
-40 to 125
-40 to 125
15 Ld Plastic SIP
Staggered Vertical
15 Ld Plastic SIP
Surface Mount
Z15.05A
Z15.05B
wPinout
ww U.comNOTE:
t4HEAT SINK TAB
INTERNALLY
eCONNECTED TO
.DataSheGROUND (VSS)
CA3282 (SIP)
TOP VIEW
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
Block Diagram
OUTPUT #0
(1 OF 8)
OUTPUT 4
OUTPUT 5
OUTPUT 6
OUTPUT 7
RESET
VDD
MISO
VSS
MOSI
SCK
CE
OUTPUT 0
OUTPUT 1
OUTPUT 2
OUTPUT 3
MOSI
SCK
MISO
CE
RESET
SHIFT
REGISTER
OUTPUT
LATCH
CURRENT
LIMIT
CONTROL
LOGIC
DIAGNOSTIC
CIRCUITRY
TO DRIVERS
1 THRU 7
wwCAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
w1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc.
File Number 2767.6
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
1









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CA3282 Даташит, Описание, Даташиты
CA3282
Absolute Maximum Ratings
Output Voltage, VO (Note 1) . . . . . . . . . . . . . . . . . . . . . VOC (Clamp)
Output Load Current, ILOAD (Per Output, Individual) . . . . . . . . . 1A
Output Load Current, ILOAD (All 8 Outputs ON, Equal IOUT) . . . . .
0.625A
Output Load Current, ILOAD (Max. Total of Outputs ON) . . . . 5.0A
DC Logic Supply, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
Input Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.7 to +7V
Operating Conditions
Ambient Temperature Range . . . . . . . . . . . . . . . . . -40oC to 125oC
Junction Temperature Range . . . . . . . . . . . . . . . . . -40oC to 150oC
Thermal Information
Thermal Resistance (Typical, Note 2)
θJA(oC/W) θJC(oC/W)
Plastic SIP
No Heat Sink . . . . . . . . . . . . . . . . . . .
45
N/A
Infinite Heat Sink . . . . . . . . . . . . . . . . .
N/A
3
Power Dissipation
Up to 125oC w/o Heat Sink . . . . . . . . . . . . . . . . . . . . . . . . 0.56W
Above 125oC w/o Heat Sink . . . . . . .Derate Linearly at 22mW/oC
Up to 125oC w/Infinite Heat Sink. . . . . . . . . . . . . . . . . . . . 8.33W
Above 125oC w/Infinite Heat Sink . . . Derate Linearly at 333mW/oC
Maximum Storage Temperature Range . . . . . . . . . -55oC to 150oC
Maximum Lead Temperature (Soldering, 10s). . . . . . . . . . . . . . . 265oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. The MOSFET Output Drain is internally clamped with a Drain-to-Gate zener diode that turns-on the MOSFET; holding the Drain at the
Output Clamp Voltage, VOC.
2. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications VDD = 5V, TA = -40oC to 125oC, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
Quiescent Supply Current, ON
Quiescent Supply Current, OFF
Output Clamping Voltage
Output Clamping Energy
Output Leakage Current
Output ON Resistance
Output Current Limit
Turn-On Delay
Turn-Off Delay
Fault Reference Voltage
Fault Reset Delay (After CE Low
to High Transition)
IDD
IDD
VOC
EOC
IO LEAK
rDS(ON)
IO LIMIT
tPHL
tPLH
VOREF
tUD
All Outputs ON, 0.5A Load Per Output
All Outputs OFF
ILOAD = 0.5A, Output Programmed OFF
ILOAD = 0.5A, Output ON
Output Programmed OFF
VO = 24V
VO = 14V
VO = 5V
ILOAD = 0.5A (Note 3)
Output Programmed ON, VOUT > 3V
IO = 500mA, No Reactive Load
IO = 500mA, No Reactive Load
Output Programmed ON, Fault Detected
If VO > VOREF
See Figure 1
Output OFF Voltage
VOFF
Output Programmed OFF, Output Pin
Floating
LOGIC INPUTS (MOSI, CE, SCK and RESET)
Threshold Voltage at Falling
Edge
VT- VDD = 5V ± 10%
Threshold Voltage at Rising
Edge
VT+ VDD = 5V ± 10%
Hysteresis Voltage
Input Current
Input Capacitance
LOGIC OUTPUT (MISO)
VH VT+ - VT-
II VDD = 5.5V, 0 < VI < VDD
CI 0 < VI < VDD
MIN
-
-
27
20
-
-
-
-
1.05
-
-
1.6
50
-
0.2VDD
-
0.85
-10
-
TYP
5
0.2
32
-
150
150
150
-
1.5
1
2
1.8
80
0
0.3VDD
0.6VDD
1.4
-
-
MAX
10
-
40
-
1000
500
200
1
-
10
10
2.0
250
1
-
0.7VDD
2.25
+10
20
UNITS
mA
mA
V
mJ
µA
µA
µA
A
µs
µs
V
µs
V
V
V
V
µA
pF
Output LOW Voltage
Output HIGH Voltage
VOL
VOH
IOL = 1.6mA
IOL = 0.8mA
-
VDD
- 1.3V
0.2
VDD
- 0.2V
0.4
-
V
V
2









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CA3282 Даташит, Описание, Даташиты
CA3282
Electrical Specifications VDD = 5V, TA = -40oC to 125oC, Unless Otherwise Specified (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP
Output Three State Leakage
Current
IOL VDD = 5.25V, 0 < VO < VDD,
CE Pin Held High
-10 -
Output Capacitance
COUT 0 < VO < VDD, CE Pin Held High
--
MAX
+10
UNITS
µA
20 pF
Serial Peripheral Interface Timing (See Figure 1B)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS
Operating Frequency
fOPER
D.C. Note 4 3.0
MHz
Enable Lead Time
(2) tLEAD
- <100 200 ns
Enable Lag Time
(3) tLAG
- <100 200 ns
Clock HIGH Time
(4) twSCK
H
- 50 100 ns
Clock LOW Time
(5) twSCK
L
- 50 100 ns
Data Setup Time
(6) tSU
- 20 50 ns
Data Hold Time
(7) tH
- 20 50 ns
Enable Time
(8) tEN
- 50 100 ns
Disable Time
(9) tDIS
-
150 300
ns
Data Valid Time
(10) tV
- 75 150 ns
Output Data Hold Time
(11) tHO
0 50 - ns
Rise Time (MISO Output)
(12) trSO VDD = 20% to 70%, CL = 200pF
- 35 100 ns
Rise Time SPI Inputs (SCK, MOSI, CE)
(12) trSI VDD = 20% to 70%, CL = 200pF
-
- 50 ns
Fall Time (MISO Output)
(13) tfSO VDD = 70% to 20%, CL = 200pF
- 45 100 ns
Fall Time SPI Inputs (SCK, MOSI, CE)
(13) tfSI VDD = 70% to 20%, CL = 200pF
-
- 50 ns
NOTES:
3. Refer to Figure 4A for IOUT current vs VSAT voltage. Typical rDS(ON) values are given for -40oC, 25oC, 105oC and 125oC temperatures.
4. The Maximum Operating Frequency is typically greater than 10MHz but it is application limited primarily by external SPI input rise/fall
times and MISO output loading.
Timing Diagrams
CE
SCK
(CPOL = 0, CPHA = 1)
MSB 6 5 4 3
2 1 LSB
INTERNAL STROBE FOR DATA CAPTURE
FIGURE 1A. DATA AND CLOCK TIMING DIAGRAM
3










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