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PDF HD66776 Data sheet ( Hoja de datos )

Número de pieza HD66776
Descripción Low Temperature Poly-Silicon TFT Panel 256-Channel Source Driver
Fabricantes Renesas Technology 
Logotipo Renesas Technology Logotipo



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HD66776
Low Temperature poly-silicon TFT Panel 256-channel
Source Driver with Internal RAM for 262,144-color display
Index
REJxxxxxxx-xxxxZ
Rev.1.11
Oct.02.2003
Description......................................................................................................... 6
Features ......................................................................................................... 7
Block Diagram................................................................................................... 8
Pin Functions..................................................................................................... 9
PAD Arrangement ............................................................................................ 14
Pad Coordinate.................................................................................................. 15
Bump Arrangement .......................................................................................... 18
Pin connecting resistance recommended value .............................................. 19
Block Function Descriptions ............................................................................ 20
System interface .................................................................................................................. 20
External Display Interface (RGB-I/F, VSYNC-I/F)............................................................ 21
Bit Operations...................................................................................................................... 21
Address Counter (AC) ......................................................................................................... 21
Graphics RAM (GRAM) ..................................................................................................... 21
Grayscale Voltage Generation Circuit................................................................................. 22
Timing Generator ................................................................................................................ 22
Oscillation Circuit (OSC) .................................................................................................... 22
Liquid Crystal Display Driver Circuit ................................................................................. 22
Interface with Power supply IC ........................................................................................... 22
GRAM Address Map ........................................................................................ 23
Relation between GRAM Addresses and Screen Position (SS = “0”)................................. 23
Relation between GRAM data and Display contents (SS = “0”)......................................... 24
Relation between GRAM Addresses and Screen Position (SS = “1”)................................. 27
Relation between GRAM data and Display contents (SS = “1”)......................................... 28
Rev.1.11, Oct.02.2003, page 1 of 175
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HD66776 pdf
HD66776
RGB I/F Operation ........................................................................................... 168
LCD Driver Output Character ........................................................................ 168
Rev.1.11, Oct. 02.2003, page 5 of 175

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HD66776 arduino
HD66776
Signal
VSYNC
Number
of pins
1
I/O Connected to Functions
I MPU
Frame synchronization signal. Polarity is inverted by the
setting of VSPL register.
VSPL
VSYNC
Unused
0
Low active
Vcc fixed
1
High active
GND fixed
HSYNC
1
I MPU
Raster-row synchronization signal. Polarity is inverted by
the setting of HSPL register.
HSPL
HSYNC
Unused
0
Low active
Vcc fixed
1
High active
GND fixed
DOTCLK 1
I MPU
Dot-clock signal. Polarity is inverted by the setting of DPL
signal.
DPL
DPTCLK
Unused
0
Data reading at
low level
Vcc fixed
1
Data reading at
high level
GND fixed
PD0-PD17 18
S1-S256 256
FLM1,2
SFTCLK11
SFTCLK12
SFTCLK21
SFTCLK22
CLA1
CLA2
CLB1
CLB2
CLC1
CLC2
2
2
2
2
2
2
I MPU
O LCD
O HD667P20
O HD667P20
O HD667P20
O HD667P20
O HD67P20
O HD667P20
Serves as 18-bit bus for RGB data.
6-bit interface: DB17 to 12
16-bit interface: DB17 to 13 and DB11 to 1
18-bit interface: DB17 to 0
Must be fixed unused pins to the Vcc or GND level.
Outputs voltages for supply to the LCD.
The SS bit can change the direction with which segment
signals are obtained from RAM. For example, if SS = 0,
the data at RAM address “00000” is output on S1. If SS =
1, it is output on S256.
Output for the frame-start pulse.
Gate shift clock for LTPS. Outputs 2-laster-row pulse.
Gate shift clock for LTPS. Outputs 2-laster-row pulse.
Signal for control of <R>, <G>, <B> switching.
Signal for control of <R>, <G>, <B> switching.
Signal for control of <R>, <G>, <B> switching.
Rev.1.11, Oct. 02.2003, page 11 of 175

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