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PDF HM62V16514L Data sheet ( Hoja de datos )

Número de pieza HM62V16514L
Descripción Wide Temperature Range Version 8 M SRAM
Fabricantes Renesas Technology 
Logotipo Renesas Technology Logotipo



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No Preview Available ! HM62V16514L Hoja de datos, Descripción, Manual

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To all our customers
Regarding the change of names mentioned in the document, such as Hitachi
Electric and Hitachi XX, to Renesas Technology Corp.
The semiconductor operations of Mitsubishi Electric and Hitachi were transferred to Renesas
Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog
and discrete devices, and memory chips other than DRAMs (flash memory, SRAMs etc.)
Accordingly, although Hitachi, Hitachi, Ltd., Hitachi Semiconductors, and other Hitachi brand
names are mentioned in the document, these names have in fact all been changed to Renesas
Technology Corp. Thank you for your understanding. Except for our corporate trademark, logo and
corporate statement, no changes whatsoever have been made to the contents of the document, and
these changes do not constitute any alteration to the contents of the document itself.
Renesas Technology Home Page: http://www.renesas.com
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DataShee
Renesas Technology Corp.
Customer Support Dept.
April 1, 2003
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HM62V16514L pdf
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Pin Arrangement
HM62V162514I Series
et4U.com
44-pin TSOP
A4
A3
A2
A1
A0
CS
I/O0
I/O1
I/O2
I/O3
VCC
VSS
I/O4
I/O5
I/O6
I/O7
WE
A18
A17
A16
A15
A14
1 44 A5
2 43 A6
3 42 A7
4 41 OE
5 40 UB
6 39 LB
7 38 I/O15
8 37 I/O14
9 36 I/O13
10 35 I/O12
11 34 VSS
12 33 VCC
13 32 I/O11
14 31 I/O10
15 30 I/O9
16 29 I/O8
17 28 A8
18 27 A9
19 26 A10
20 25 A11
21 24 A12
D2a2taSheet4U.2c3om A13
(Top view)
Pin Description
Pin name
A0 to A18
I/O0 to I/O15
CS
WE
OE
LB
UB
VCC
VSS
Function
Address input
Data input/output
Chip select
Write enable
Output enable
Lower byte select
Upper byte select
Power supply
Ground
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HM62V16514L arduino
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HM62V162514I Series
Write Cycle
HM62V16514I
-5
Parameter
Symbol Min Max Unit Notes
Write cycle time
tWC 55 — ns
Address valid to end of write
tAW 50 — ns
Chip selection to end of write
tCW 50 — ns 5
Write pulse width
tWP 40 — ns 4
LB, UB valid to end of write
tBW 50 — ns
Address setup time
tAS 0 — ns 6
Write recovery time
tWR 0 — ns 7
Data to write time overlap
tDW 25 — ns
Data hold from write time
tDH 0 — ns
Output active from end of write
tOW 5 — ns 2
Output disable to output in High-Z
tOHZ 0 20 ns 1, 2
et4U.coWmrite to output in high-Z
tWHZ 0 20 ns 1, 2
Notes: 1. tCHZ, tOHZ, tWHZ and tBHZ are defined as the time at which the outputs achieve the open circuit
conditions and are not referred to output voltage levels.
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2. This parameter is sampled and noDt 1a0ta0S%hteeestte4dU. .com
3. At any given temperature and voltage condition, tHZ max is less than tLZ min both for a given device
and from device to device.
4. A write occures during the overlap of a low CS, a low WE and a low LB or a low UB. A write begins
at the latest transition among CS going low, WE going low and LB going low or UB going low. A
write ends at the earliest transition among CS going high, WE going high and LB going high or UB
going high. tWP is measured from the beginning of write to the end of write.
5. tCW is measured from the later of CS going low to the end of write.
6. tAS is measured from the address valid to the beginning of write.
7. tWR is measured from the earliest of CS or WE going high to the end of write cycle.
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