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74AUP2G08 PDF даташит

Спецификация 74AUP2G08 изготовлена ​​​​«NXP Semiconductors» и имеет функцию, называемую «Low Power Dual 2-Input AND Gate».

Детали детали

Номер произв 74AUP2G08
Описание Low Power Dual 2-Input AND Gate
Производители NXP Semiconductors
логотип NXP Semiconductors логотип 

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74AUP2G08 Даташит, Описание, Даташиты
74AUP2G08
Low-power dual 2-input AND gate
Rev. 7 — 18 January 2013
Product data sheet
1. General description
The 74AUP2G08 provides the dual 2-input AND function.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire VCC range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire
VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using IOFF. The IOFF
circuitry disables the output, preventing a damaging backflow current through the device
when it is powered down.
2. Features and benefits
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
Complies with JEDEC standards:
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F Class 3A exceeds 5000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101E exceeds 1 000 V
Low static power consumption; ICC = 0.9 A (maximum)
Latch-up performance exceeds 100 mA per JESD78 Class II
Inputs accept voltages up to 3.6 V
Low noise overshoot and undershoot < 10 % of VCC
IOFF circuitry provides partial power-down mode operation
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C









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74AUP2G08 Даташит, Описание, Даташиты
NXP Semiconductors
74AUP2G08
Low-power dual 2-input AND gate
3. Ordering information
Table 1. Ordering information
Type number
Package
Temperature range Name
74AUP2G08DC 40 C to +125 C VSSOP8
74AUP2G08GT 40 C to +125 C XSON8
74AUP2G08GF 40 C to +125 C XSON8
74AUP2G08GD 40 C to +125 C XSON8
74AUP2G08GM 40 C to +125 C XQFN8
74AUP2G08GN 40 C to +125 C XSON8
74AUP2G08GS 40 C to +125 C XSON8
Description
Version
plastic very thin shrink small outline package; 8 leads; SOT765-1
body width 2.3 mm
plastic extremely thin small outline package; no leads; SOT833-1
8 terminals; body 1 1.95 0.5 mm
extremely thin small outline package; no leads;
8 terminals; body 1.35 1 0.5 mm
SOT1089
plastic extremely thin small outline package; no leads; SOT996-2
8 terminals; body 3 2 0.5 mm
plastic, extremely thin quad flat package; no leads;
8 terminals; body 1.6 1.6 0.5 mm
SOT902-2
extremely thin small outline package; no leads;
8 terminals; body 1.2 1.0 0.35 mm
SOT1116
extremely thin small outline package; no leads;
8 terminals; body 1.35 1.0 0.35 mm
SOT1203
4. Marking
Table 2. Marking codes
Type number
74AUP2G08DC
74AUP2G08GT
74AUP2G08GF
74AUP2G08GD
74AUP2G08GM
74AUP2G08GN
74AUP2G08GS
Marking code[1]
p08
p08
pE
p08
p08
pE
pE
[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.
5. Functional diagram
1A
1Y
1B
2A
2Y
2B
001aah788
Fig 1. Logic symbol
&
&
001aah789
Fig 2. IEC logic symbol
A
Y
B
mna221
Fig 3. Logic diagram (one gate)
74AUP2G08
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 18 January 2013
© NXP B.V. 2013. All rights reserved.
2 of 21









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74AUP2G08 Даташит, Описание, Даташиты
NXP Semiconductors
6. Pinning information
6.1 Pinning
74AUP2G08
1A 1
1B 2
2Y 3
GND 4
8 VCC
7 1Y
6 2B
5 2A
001aae236
Fig 4. Pin configuration SOT765-1
74AUP2G08
Low-power dual 2-input AND gate
74AUP2G08
1A 1
8 VCC
1B 2
7 1Y
2Y 3
6 2B
GND 4
5 2A
001aae237
Transparent top view
Fig 5. Pin configuration SOT833-1, SOT1089,
SOT1116 and SOT1203
74AUP2G08
1A 1
1B 2
8 VCC
7 1Y
2Y 3
6 2B
GND 4
5 2A
001aai215
Transparent top view
Fig 6. Pin configuration SOT996-2
terminal 1
index area
74AUP2G08
1Y 1
7 1A
2B 2
6 1B
2A 3
5 2Y
001aae357
Transparent top view
Fig 7. Pin configuration SOT902-2
6.2 Pin description
Table 3.
Symbol
1A, 2A
1B, 2B
GND
1Y, 2Y
VCC
Pin description
Pin
SOT765-1, SOT833-1, SOT1089,
SOT996-2, SOT1116 and SOT1203
1, 5
2, 6
4
7, 3
8
SOT902-2
7, 3
6, 2
4
1, 5
8
Description
data input
data input
ground (0 V)
data output
supply voltage
74AUP2G08
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 18 January 2013
© NXP B.V. 2013. All rights reserved.
3 of 21










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