PDF WSF512K16-XXX Data sheet ( Hoja de datos )

Número de pieza	WSF512K16-XXX
Descripción	512KX16 SRAM/FLASH MODULE
Fabricantes	White Electronic
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No Preview Available ! www.DataSheet4U.com White Electronic Designs WSF512K16-XXX 512KX16 SRAM/FLASH MODULE, SMD 5962-96901 FEATURES Access Times of 35ns (SRAM) and 90ns (FLASH) TTL Compatible Inputs and Outputs Access Times of 70ns (SRAM) and 120ns (FLASH) Packaging • 66 pin, PGA Type, 1.385" square HIP, Hermetic Ceramic HIP (Package 402) • 68 lead, Hermetic CQFP (G2), 22mm (0.880") square (Package 500). Designed to ﬁt JEDEC 68 lead 0.990” CQFJ footprint (FIGURE 2) Built-in Decoupling Caps and Multiple Ground Pins for Low Noise Operation Weight - 13 grams typical FLASH MEMORY FEATURES 100,000 Erase/Program Cycles Sector Architecture 512Kx16 SRAM • 8 equal size sectors of 64K bytes each 512Kx16 5V FLASH Organized as 512Kx16 of SRAM and 512Kx16 of Flash Memory with separate Data Busses • Any combination of sectors can be concurrently erased. Also supports full chip erase 5 Volt Programming; 5V ± 10% Supply Both blocks of memory are User Conﬁgurable as 1Mx8 Low Power CMOS Commercial, Industrial and Military Temperature Ranges Embedded Erase and Program Algorithms Hardware Write Protection Page Program Operation and Internal Program Control Time. Note: Programming information available upon request. FIGURE 1 – PIN CONFIGURATION FOR WSF512K16-XH2X Top View 1 12 23 34 45 56 SD8 SWE2# SD15 FD8 VCC FD15 SD9 SCS2# SD14 FD9 FCS2# FD14 SD10 GND SD13 FD10 FWE2# FD13 A13 SD11 SD12 A6 FD11 FD12 A14 A10 OE# A7 A3 A0 A15 A11 A17 NC A4 A1 A16 A12 SWE1# A8 A5 A2 A18 VCC SD7 A9 FWE1# FD7 SD0 SCS1# SD6 FD0 FCS1# FD6 SD1 NC SD5 FD1 GND FD5 SD2 SD3 SD4 11 22 33 FD2 FD3 FD4 44 55 66 Pin Description FD0-15 SD0-15 A0-18 SWE1-2# SCS1-2# OE# VCC GND NC FWE1-2# FCS1-2# Flash Data Inputs/Outputs SRAM Data Inputs/Outputs Address Inputs SRAM Write Enable SRAM Chip Selects Output Enable Power Supply Ground Not Connected Flash Write Enable Flash Chip Select Block Diagram OE# A0-18 SWE1# SCS1# SWE2# SCS2# FWE1# FCS1# FWE2# FCS2# 512K x 8 SRAM 512K x 8 SRAM 512K x 8 FLASH 512K x 8 FLASH 8 SD0-7 8 SD8-15 8 FD0-7 8 FD8-15 White Electronic Designs Corp. reserves the right to change products or speciﬁcations without notice. May 2006 Rev. 6 1 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com 1 page White Electronic Designs WSF512K16-XXX ADDRESS DATA I/O FIGURE 4 – SRAM TIMING WAVEFORM — READ CYCLE tRC tAA tOH PREVIOUS DATA VALID DATA VALID READ CYCLE 1 (SCS# = OE# = VIL, SWE# = VIH) ADDRESS SCS# SOE# DATA I/O tRC tAA tACS tCLZ tOE tOLZ HIGH IMPEDANCE tCHZ tOHZ DATA VALID READ CYCLE 2 (SWE# = VIH) FIGURE 5 – SRAM WRITE CYCLE — SWE# CONTROLLED ADDRESS SCS# SWE# DATA I/O tWC tAW tCW tAH tAS tWP tWHZ tOW tDW tDH DATA VALID WRITE CYCLE 1, SWE# CONTROLLED FIGURE 6 – SRAM WRITE CYCLE — SCS# CONTROLLED ADDRESS SCS# tAS tWC tAW tCW tAH SWE# DATA I/O tWP tDW tDH DATA VALID WRITE CYCLE 2, SCS# CONTROLLED White Electronic Designs Corp. reserves the right to change products or speciﬁcations without notice. May 2006 Rev. 6 5 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com 5 Page White Electronic Designs WSF512K16-XXX FIGURE 10 – AC WAVEFORMS FOR DATA# POLLING DURING EMBEDDED ALGORITHM OPERATIONS FOR FLASH MEMORY FCS# tCH OE# FWE# tOEH D7 D0-D6 D7 tDF tOE tCE tWHWH 1 or 2 D7# D0-D6 = Invalid tWHWH 1 or 2 D7 tOH D7 = Valid Data D0-D7 Valid Data tOE D7 Valid Data High Z High Z White Electronic Designs Corp. reserves the right to change products or speciﬁcations without notice. May 2006 Rev. 6 11 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com 11 Page

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