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PDF 74V2T03 Data sheet ( Hoja de datos )
| Número de pieza | 74V2T03 | |
| Descripción | DUAL 2-INPUT OPEN DRAIN NAND GATE | |
| Fabricantes | ST Microelectronics | |
| Logotipo |  |
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74V2T03
DUAL 2-INPUT OPEN DRAIN NAND GATE
s HIGH SPEED: tPD = 5.4ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 1µA(MAX.) at TA = 25°C
s COMPATIBLE WITH TTL OUTPUTS:
VIH = 2V (MIN), VIL = 0.8V (MAX)
s POWER DOWN PROTECTION ON INPUTS
s OPERATING VOLTAGE RANGE:
VCC(OPR) = 4.5V to 5.5V
s IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74V2T03 is an advanced high-speed CMOS
DUAL 2-INPUT OPEN DRAIN NAND GATE
fabricated with sub-micron silicon gate and
double-layer metal wiring C2MOS technology.
The internal circuit is composed of 3 stages
including buffer output, which provide high noise
immunity and stable output.
The device can, with an external pull-up resistor,
be used in wired AND configuration. This device
SOT23-8L
ORDER CODES
PACKAGE
SOT23-8L
T&R
74V2T03STR
can also be used as a led driver in any other
application requiring current sink.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
PIN CONNECTION AND IEC LOGIC SYMBOLS
June 2003
1/7
1 page  
DIM.
A
A1
A2
b
C
D
E
E1
e
e1
L
SOT23-8L MECHANICAL DATA
MIN.
0.90
0.00
0.90
0.22
0.09
2.80
2.60
1.50
0
0.35
mm.
TYP
.65
1.95
MAX.
1.45
0.15
1.30
0.38
0.20
3.00
3.00
1.75
MIN.
35.4
0.0
35.4
8.6
3.5
110.2
102.3
59.0
0.55 13.7
mils
TYP.
25.6
76.7
74V2T03
MAX.
57.1
5.9
51.2
14.9
7.8
118.1
118.1
68.8
21.6
5/7
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet 74V2T03.PDF ] | |
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