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PDF WF512K32-xxx5 Data sheet ( Hoja de datos )
| Número de pieza | WF512K32-xxx5 | |
| Descripción | 512Kx32 5V FLASH MODULE | |
| Fabricantes | White Electronic Designs | |
| Logotipo |  |
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WF512K32-XXX5
HI-RELIABILITY PRODUCT
512Kx32 5V FLASH MODULE, SMD 5962-94612
FEATURES
s Access Times of 60, 70, 90, 120, 150ns
s Packaging
• 66 pin, PGA Type, 1.075" square, Hermetic
Ceramic HIP (Package 400(1))
• 68 lead, 40mm, Low Capacitance Hermetic CQFP
(Package 501)
• 68 lead, 40mm, Low Profile 3.5mm (0.140"), CQFP
(Package 502)
• 68 lead, 22.4mm (0.880") Low Profile CQFP (G2U), 3.5mm
(0.140") high, (Package 510)
• 68 lead, 23.9mm (0.940") Low Profile CQFP (G1U), 3.5mm
(0.140") high, (Package 519)
s 100,000 Erase/Program Cycles Minimum
s Sector Architecture
• 8 equal size sectors of 64KBytes each
• Any combination of sectors can be concurrently erased.
Also supports full chip erase
s Organized as 512Kx32
s Commercial, Industrial and Military Temperature Ranges
s 5 Volt Programming. 5V ± 10% Supply.
s Low Power CMOS, 6.5mA Standby
s Embedded Erase and Program Algorithms
s TTL Compatible Inputs and CMOS Outputs
s Built-in Decoupling Caps for Low Noise Operation
s Page Program Operation and Internal Program Control Time
s Weight
WF512K32-XG2UX5 - 8 grams typical
WF512K32-XH1X5 - 13 grams typical
WF512K32-XG4X5 - 20 grams typical
WF512K32-XG4TX5 - 20 grams typical
WF512K32-XG1UX5 - 5 grams typical
1. Call factory for PGA type (HIP) package options.
Note: See Flash Programming Application Note 4M5 for algorithms.
FIG. 1 PIN CONFIGURATION FOR WF512K32N-XH1X5
TOP VIEW
1 12 23
34 45 56
I/O8 WE2 I/O15
I/O24
VCC I/O31
I/O9 CS2 I/O14
I/O25
CS4
I/O30
I/O10
GND
I/O13
I/O26
WE4
I/O29
A14
I/O11
I/O12
A7 I/O27
I/O28
A16 A10
OE
A12 A4
A1
A11 A9
A17
NC A5
A2
PIN DESCRIPTION
I/O0-31 Data Inputs/Outputs
A0-18
Address Inputs
WE1-4
Write Enables
CS1-4
Chip Selects
OE Output Enable
VCC Power Supply
GND Ground
NC Not Connected
A0 A15 WE1
A18 VCC I/O7
I/O0 CS1 I/O6
I/O1 NC
I/O5
A13
A8
I/O16
I/O17
A6
WE3
CS3
GND
A3
I/O23
I/O22
I/O21
OE
A0-18
BLOCK DIAGRAM
W E1 CS1
W E2 CS2
W E3 CS3
512K x 8
512K x 8
512K x 8
W E4 CS4
512K x 8
I/O2 I/O3
I/O4
11 22
33
I/O18
I/O19
I/O20
44 55 66
8
I/O0-7
8
I/O8-15
8
I/O16-23
8
I/O24-31
April 2001 Rev. 4
1 White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520
1 page  
WF512K32-XXX5
AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS, WE CONTROLLED
(VCC = 5.0V, TA = -55°C to +125°C)
Parameter
Symbol
Write Cycle Time
Chip Select Setup Time
Write Enable Pulse Width
Address Setup Time
Data Setup Time
Data Hold Time
Address Hold Time
Write Enable Pulse Width High
Duration of Byte Programming Operation (1)
Sector Erase Time (2)
Read Recovery Time before Write
VCC Set-up Time
Chip Programming Time
Output Enable Setup Time
tAVAV
tELWL
tWLWH
tAVWH
tDVWH
tWHDX
tWHAX
tWHWL
tWHWH1
tWHWH2
tGHWL
Output Enable Hold Time (4)
Chip Erase Time (3)
NOTES:
1. Typical value for tWHWH1 is 7µs.
2. Typical value for tWHWH2 is 1sec.
3. Typical value for Chip Erase Time is 8sec.
4. For Toggle and Data Polling.
tWC
tCS
tWP
tAS
tDS
tDH
tAH
tWPH
tVCS
tOES
tOEH
-60
Min Max
60
0
40
0
40
0
40
20
300
15
0
50
11
0
10
64
-70
Min Max
70
0
45
0
45
0
45
20
300
15
0
50
11
0
10
64
-90
Min Max
90
0
45
0
45
0
45
20
300
15
0
50
11
0
10
64
-120 -150 Unit
Min Max Min Max
1W20 F512K15302-XXXn5s
0 0 ns
50 50 ns
00
50 50
00
50 50
20 20
300 300
15 15
ns
ns
ns
ns
ns
µs
sec
00
50 50
11 11
00
ns
µs
sec
ns
10 10 ns
64 64 sec
AC CHARACTERISTICS – READ ONLY OPERATIONS
(VCC = 5.0V, TA = -55°C to +125°C)
Parameter
Read Cycle Time
Address Access Time
Chip Select Access Time
Output Enable to Output Valid
Chip Select to Output High Z (1)
Output Enable High to Output High Z (1)
Output Hold from Address, CS or OE Change,
whichever is First
1. Guaranteed by design, but not tested
Symbol
tAVAV
tAVQV
tELQV
tGLQV
tEHQZ
tGHQZ
tAXQX
tRC
tACC
tCE
tOE
tDF
tDF
tOH
-60
Min Max
60
60
60
30
20
20
0
-70
Min Max
70
70
70
35
20
20
0
-90
Min Max
90
90
90
35
20
20
0
-120
Min Max
120
120
120
50
30
30
0
-150
Min Max
150
150
150
55
35
35
0
Unit
ns
ns
ns
ns
ns
ns
ns
5 White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520
5 Page 
WF512K32-XXX5
PACKAGE 400: 66 PIN, PGA TYPE, CERAMIC HEX-IN-LINE PACKAGE, HIP (H1)
27.3 (1.075) ± 0.25 (0.010) SQ
PIN 1 IDENTIFIER
SQUARE PAD
ON BOTTOM
25.4 (1.0) TYP
4.34 (0.171)
MAX
3.81 (0.150)
± 0.13 (0.005)
2.54 (0.100)
TYP
15.24 (0.600) TYP
25.4 (1.0) TYP
1.42 (0.056) ± 0.13 (0.005)
0.76 (0.030) ± 0.13 (0.005)
1.27 (0.050) TYP DIA
0.46 (0.018) ± 0.05 (0.002) DIA
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
11 White Electronic Designs Corporation • Phoenix, AZ • (602) 437-1520
11 Page | ||
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| PDF Descargar | [ Datasheet WF512K32-xxx5.PDF ] | |
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