|
|
PDF HDMP-0440 Data sheet ( Hoja de datos )
| Número de pieza | HDMP-0440 | |
| Descripción | Quad Port Bypass Circuit | |
| Fabricantes | Hewlett-Packard | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de HDMP-0440 (archivo pdf) en la parte inferior de esta página. Total 10 Páginas | ||
|
No Preview Available !
www.DataSheet4U.com
Agilent HDMP-0440
Quad Port Bypass Circuit
for Fibre Channel Arbitrated Loops
Data Sheet
Description
The HDMP-0440 is a Quad Port
Bypass Circuit (PBC), which
provides a low-cost, low-power
physical-layer solution for Fibre
Channel Arbitrated Loop (FC-AL)
disk array configurations. By using
a PBC such as the HDMP-0440,
hard disks may be pulled out or
swapped while other disks in the
array are available to the system.
A PBC consists of multiple 2:1
multiplexers daisy chained
together. Each port has two modes
of operation: “disk in loop” and
“disk bypassed.” When the “disk in
loop” mode is selected, the loop
goes into and out of the disk drive
at that port. For example, data goes
from the HDMP-0440’s
TO_NODE[n]± differential output
pins to the Disk Drive Transceiver
IC’s (e.g. an HDMP-1636A) Rx
differential input pins. Data from
the Disk Drive Transceiver IC’s Tx
differential outputs goes to the
HDMP-0440’s FM_NODE[n]±
differential input pins. Figure 2
shows connection diagrams for
disk drive array applications.
When the “disk bypassed” mode
is selected, the disk drive is either
absent or non-functional and the
loop bypasses the hard disk.
The “disk bypassed” mode is
enabled by pulling the
BYPASS[n]- pin low. Leave
BYPASS[n]- floating to enable the
“disk in loop” mode. HDMP-
0440s may be cascaded with
other members of the HDMP-
04XX/HDMP-05XX family
through the appropriate
FM_NODE[n]± and
TO_NODE[n]± pins to
accommodate any number of
hard disks (see Figure 3). The
unused cells in the HDMP-0440
may be bypassed by using
pulldown resistors on the
BYPASS[n]- pins for these cells.
An HDMP-0440 may also be
configured as five 1:1 buffers, as
two 2:1 multiplexers or as two
1:2 buffers.
Features
• Supports 1.0625 GBd Fibre
Channel operation
• Supports 1.25 GBd Gigabit
Ethernet (GE) operation
• Quad PBC in one package
• Equalizers on all inputs
• High-speed LVPECL I/O
• Buffered Line Logic (BLL) outputs
(no external bias resistors
required)
• 0.5 W typical power at VCC = 3.3 V
• 44 Pin, 10 mm, low-cost plastic
QFP package
Applications
• RAID, JBOD, BTS cabinets
• Two 2:1 muxes
• Two 1:2 buffers
• 1 ≥ N Gigabit serial buffer
• N ≥ 1 Gigabit serial mux
HDMP-0440
CAUTION: As with all semiconductor ICs, it is advised that normal static precautionsb be taken in
the handling and assembly of this component to prevent damage and/or degradation which may be
induced by electrostatic discharge (ESD).
1 page  
Absolute Maximum Ratings
TA = 25°C, except as specified. Operation in excess of any of these conditions may result in permanent damage to this
device. Continuous operation at these minimum or maximum ratings is not recommended.
Symbol
Parameter
Units
Min. Max.
VCC
VIN,LVTTL
Supply Voltage
LVTTL Input Voltage
V –0.5 4.0
V –0.5 VCC + 0.5[1]
VIN,HS_IN
HS_IN Input Voltage (Differential)
mV 200 2000
IO,LVTTL
LVTTL Output Sink/Source Current
mA
±13
Tstg Storage Temperature
°C –65 +150
Tj Junction Temperature
°C 0 +125
Note:
1. Must remain less than or equal to absolute maximum VCC voltage of 4.0 V.
DC Electrical Specifications
TA = 0°C to +70°C, VCC = 3.15 V to 3.45 V.
Symbol
Parameter
VIH,LVTTL
LVTTL Input High Voltage Range
VIL,LVTTL
LVTTL Input Low Voltage Range
VOH,LVTTL
LVTTL Output High Voltage Range, IOH = -400 µA
VOL,LVTTL
LVTTL Output Low Voltage Level, IOL = 1 mA
IIH,LVTTL
Input High Current (Magnitude), VIN = 2.4 V, VCC = 3.45 V
IIL,LVTTL
Input Low Current (Magnitude), VIN = 0.4 V, VCC = 3.45 V
ICC Total Supply Current, TA = 25°C
Units Min. Typ. Max.
V 2.0
V 0.8
V 2.2
VCC
V0
0.6
µA 40
µA –600
mA 150 185
5
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet HDMP-0440.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| HDMP-0440 | Quad Port Bypass Circuit | Hewlett-Packard |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |