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HMN4M8DV PDF даташит

Спецификация HMN4M8DV изготовлена ​​​​«Hanbit Electronics» и имеет функцию, называемую «Non-Volatile SRAM MODULE 32Mbit».

Детали детали

Номер произв HMN4M8DV
Описание Non-Volatile SRAM MODULE 32Mbit
Производители Hanbit Electronics
логотип Hanbit Electronics логотип 

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HMN4M8DV Даташит, Описание, Даташиты
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HANBit
HMN4M8DV(N)
Non-Volatile SRAM MODULE 32Mbit (4,096K x 8-Bit), 40Pin-DIP, 3.3V
Part No. HMN4M8DV(N)
GENERAL DESCRIPTION
The HMN4M8DV Nonvolatile SRAM is a 33,554,432-bit static RAM organized as 4,194,304 bytes by 8 bits.
The HMN4M8DV has a self-contained lithium energy source provide reliable non -volatility coupled with the unlimited write
cycles of standard SRAM and integral control circuitry which constantly monitors the single 3.3V supply for an out-of-
tolerance condition. When such a condition occurs, the lithium energy source is automatically switched on to sustain the
memory until after VCC returns valid and write protection is unconditionally enabled to prevent garbled data. In addition the
SRAM is unconditionally write-protected to prevent an inadvertent write operation. At this time the integral energy source
is switched on to sustain t he memory until after VCC returns valid.
The HMN4M8DV uses extremely low standby current CMOS SRAMs, coupled with small lithium coin cells to provide non -
volatility without long write-cycle times and the write-cycle limitations associated with EEPROM.
FEATURES
w Access time : 55, 70ns
w High-density design : 32Mbit
Design
w Battery internally isolated until
power is applied
w Industry-standard 40-pin 4,096K
x 8 pinout
w Unlimited write cycles
w Data retention in the absence of
VCC
w 5-years minimum data retention
in absence of power
w Automatic write-protection during
power-up/power-down cycles
w Data is automatically protected
during power loss
PIN ASSIGNMENT
A21 1
A20 2
A18 3
A16 4
A14 5
A12 6
A7 7
A6 8
A5 9
A4 10
A3 11
A2 12
A1 13
A0 14
DQ0 15
DQ1 16
DQ2 17
VSS 18
NC 1
36 VCC A21 2
35 A19 A20 3
34 NC A18 4
33 A15 A16 5
32 A17 A14 6
31 /WE A12 7
30 A13 A7 8
29 A8
A6 9
28 A9
A5 10
27 A11 A4 11
26 /OE A3 12
25 A10 A2 13
24 /CE A1 14
23 DQ7 A0 15
22 DQ6 DQ0 16
21 DQ5 DQ1 17
20 DQ4 DQ2 18
19 DQ3 VSS 19
NC 20
40 NC
39 VCC
38 A19
37 NC
36 A15
35 A17
34 /WE
33 A13
32 A8
31 A9
30 A11
29 /OE
28 A10
27 /CE
26 DQ7
25 DQ6
24 DQ5
23 DQ4
22 DQ3
21 NC
36-pin Encapsulated Package
40-pin Encapsulated Package
w Package Option
- HMN4M8DV
- HMN4M8DVN
- 36 Pin DIP Package
- 40 Pin DIP Package
URL : www.hbe.co.kr
Rev. 1.0 (May, 2002)
1 HANBit Electronics Co.,Ltd









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HMN4M8DV Даташит, Описание, Даташиты
HANBit
HMN4M8DV(N)
FUNCTIONAL DESCRIPTION
The HMN4M8DV executes a read cycle whenever /WE is inactive(high) and /CE is active(low). The address specified by
the address inputs(A0-A19) defines which of the 4,194,304 bytes of data is accessed. Valid data will be a vailable to the
eight data output drivers within tACC (access time) after the last address input signal is stable.
When power is valid, the HMN4M8DV operates as a standard CMOS SRAM. During power -down and power-up cycles,
the HMN4M8DV acts as a nonvolatile memory, automatically protecting and preserving the memory contents.
The HMN4M8DV is in the write mode whenever the /WE and /CE signals are in the active (low) state after address inputs
are stable. The later occurring falling edge of /CE or /WE will d etermine the start of the write cycle. The write cycle is
terminated by the earlier rising edge of /CE or /WE. All address inputs must be kept valid throughout the write cycle. WE
must return to the high state for a minimum recovery time (t WR) before another cycle can be initiated. The /OE control
signal should be kept inactive (high) during write cycles to avoid bus contention. However, if the output bus been enabled
(/CE and /OE active) then /WE will disable the outputs in t ODW from its falling edge.
The HMN4M8DV provides full functional capability for V cc greater than 4.5 V and write protects by 4.37 V nominal.
Power-down/power-up control circuitry constantly monitors the V cc supply for a power-fail-detect threshold VPFD. When
VCC falls below the VPFD threshold, the SRAM automatically write -protects the data. All inputs to the RAM become dont
careand all outputs are high impedance. As V cc falls below approximately 3 V, the power switching circuit connects the
lithium energy soure to RAM to retain d ata. During power-up, when Vcc rises above approximately 3.0 volts, the power
switching circuit connects external V cc to the RAM and disconnects the lithium energy source. Normal RAM operation
can resume after Vcc exceeds 4.5 volts.
BLOCK DIAGRAM
/OE
/WE
/CE
A20-A21
(1M x 8) x 4
SRAM
Block CE2
/CE1
A0-A19
DQ0-DQ7
Power
/CE CON
Power Fail
Control
VCC
Lithium
Cell
PIN DESCRIPTION
A0-A21 : Address Input
/CE : Chip Enable
VSS : Ground
DQ0-DQ7 : Data In / Data Out
/WE : Write Enable
/OE : Output Enable
VCC: Power (+5V)
NC : No Connection
URL : www.hbe.co.kr
Rev. 1.0 (May, 2002)
2 HANBit Electronics Co.,Ltd









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HMN4M8DV Даташит, Описание, Даташиты
HANBit
HMN4M8DV(N)
TRUTH TABLE
MODE
/OE
/CE
CE2
/WE I/O OPERATION
POWER
Not selected
X
H
X
X
High Z
Standby
Output disable
H
L
H
H
Read
L L HH
Write
XL HL
High Z
DOUT
DIN
Active
Active
Active
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
RATING
CONDITIONS
DC voltage applied on VCC relative to VSS
DC Voltage applied on any pin excluding V CC relative
to VSS
Operating temperature
VCC
VT
TOPR
-0.5V to VCC +0.2V
-0.2V to 4.6V
0 to 70°C
-40 to 85°C
Commercial
Industrial
Storage temperature
TSTG
-65°C to 150°C
Temperature under bias
TBIAS
-40°C to 85°C
Soldering temperature
TSOLDER
260°C
For 10 second
NOTE: Permanent device damage may occur if Absolute Maximum Ratings are exceeded.
Functional operation should be restricted to the Recommended DC Operating Conditions detailed in this data sheet.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
RECOMMENDED DC OPERATING CONDITIONS ( TA= TOPR )
PARAMETER SYMBOL MIN TYPICAL
Supply Voltage
VCC 3.0V
Ground
VSS 0
Input high voltage
VIH 2.2
Input low voltage
VIL -0.2 2)
NOTE: 1. Overshoot: VCC+2.0V in case of pulse width 20ns.
2. Undershoot: -2.0V in case of pulse width 20ns.
3. Overshoot and undershoot are sampled, not 100% tested.
3.3V
0
-
-
MAX
3.6V
0
VCC+0.3V 1)
0.6V
URL : www.hbe.co.kr
Rev. 1.0 (May, 2002)
3 HANBit Electronics Co.,Ltd










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Номер в каталогеОписаниеПроизводители
HMN4M8DNon-Volatile SRAM MODULE 32MbitHanbit Electronics
Hanbit Electronics
HMN4M8DNNon-Volatile SRAM MODULE 32MbitHanbit Electronics
Hanbit Electronics
HMN4M8DVNon-Volatile SRAM MODULE 32MbitHanbit Electronics
Hanbit Electronics

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