|
|
PDF NJU6820 Data sheet ( Hoja de datos )
| Número de pieza | NJU6820 | |
| Descripción | 40-common x 128RGB-Segment | |
| Fabricantes | New Japan Radio | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de NJU6820 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
www.DataSheet4U.com
NJU6820
Preliminary
40-common x 128RGB-Segment, in 4096-Color
4096-Color STN LCD DRIVER
s GENERAL DESCRIPTION
The NJU6820 is a STN LCD driver with 40-
common x 128RGB-segment in 4096-color. It
consists of 384(128xRGB)-segment segment, 40-
common drivers, serial and parallel MPU interface
circuits, internal power supply circuits, gradation
palettes and 61,440-bit for graphic display data
RAM.
Each segment driver outputs 16-gradation level
out of 32-gradation level of gradation palette.
Since the NJU6820 provides a low operating
voltage of 1.7V and low operating current, it is
ideally suited for battery-powered handheld
applications.
s PACKAGE OUTLINE
NJU6820CJ
s FEATURES
q 4096-color STN LCD driver
q LCD drivers
40 commons, 128 RGB-segments,
q Display data RAM (DDRAM) 61,440-bit for graphic display
q Color display mode
16 gradation level out of 32 gradation level of gradation palette
q Black & white display mode 40 x 384 pixels in 16 gradation level or 40 x 384 pixels in B&W display
q 256-color driving mode
q 8/16bit Parallel interface directly-connective to 68/80 series MPU
q Programmable 8- or 16-bit data bus length for display data
q 3-/4-line Serial interface
q Programmable duty and bias ratios
q Programmable internal voltage booster (maximum 5-times)
q Programmable contrast control using 128-step EVR
q Various instructions
Display data read/write, Display ON/OFF, Reverse display ON/OFF, All pixels ON/OFF,
Column address, row address, N-line inversion, Initial display line, Initial COM line,
Read-modify-write, Gradation mode control, Increment control, Data bus length,
Discharge ON/OFF, Duty cycle ratio, LCD bias ratio, Boost level, EVR control,
Power save ON/OFF, etc
q Internal voltage regulator
q Low operating current
q Low logic supply voltage
1.7V to 3.3V
q LCD driving supply voltage
5.0V to 18.0V
q C-MOS technology
q Rectangle out look for COG
q Package
Bumped chip / TCP
02/08/26
-1-
1 page  
NJU6820
s PAD COORDINATES 3
PAD
No.
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
Terminal
C2+
C2+
DMY77
C2-
C2-
C2-
C2-
C2-
C2-
C2-
C2-
C2-
C2-
DMY78
C3+
C3+
C3+
C3+
C3+
C3+
C3+
C3+
C3+
C3+
DMY79
C3-
C3-
C3-
C3-
C3-
C3-
C3-
C3-
C3-
C3-
DMY80
C4+
C4+
C4+
C4+
C4+
C4+
C4+
C4+
C4+
C4+
DMY81
C4-
C4-
C4-
X(µm)
6489
6531
6573
6615
6657
6699
6741
6783
6825
6867
6909
6951
6993
7035
7077
7119
7161
7203
7245
7287
7329
7371
7413
7455
7497
7539
7581
7623
7665
7707
7749
7791
7833
7875
7917
7959
8001
8043
8085
8127
8169
8211
8253
8295
8337
8379
8421
8463
8505
8547
Y(µm)
PAD
No.
-990 351
-990 352
-990 353
-990 354
-990 355
-990 356
-990 357
-990 358
-990 359
-990 360
-990 361
-990 362
-990 363
-990 364
-990 365
-990 366
-990 367
-990 368
-990 369
-990 370
-990 371
-990 372
-990 373
-990 374
-990 375
-990 376
-990 377
-990 378
-990 379
-990 380
-990 381
-990 382
-990 383
-990 384
-990 385
-990 386
-990 387
-990 388
-990 389
-990 390
-990 391
-990 392
-990 393
-990 394
-990 395
-990 396
-990 397
-990 398
-990 399
-990 400
Chip Size 18860µm x 2390µm (Chip Center 0µm x 0µm )
Terminal
X(µm)
Y(µm)
PAD
No.
Terminal
X(µm) Y(µm)
C4-
C4-
C4-
C4-
C4-
C4-
C4-
DMY82
DMY83
DMY84
DMY85
DMY86
DMY86
DMY86
DMY87
DMY88
DMY89
DMY90
COM19
COM18
COM17
COM16
COM15
COM14
COM13
COM12
COM11
COM10
COM9
COM8
COM7
COM6
COM5
COM4
COM3
COM2
COM1
COM0
DMY91
DMY92
DMY93
SEGA0
SEGB0
SEGC0
SEGA1
SEGB1
SEGC1
SEGA2
SEGB2
SEGC2
8589
8631
8673
8715
8757
8799
8841
8883
8925
8967
9225
9225
9225
9225
9225
9135
9093
9051
9009
8967
8925
8883
8841
8799
8757
8715
8673
8631
8589
8547
8505
8463
8421
8379
8337
8295
8253
8211
8169
8127
8085
8043
8001
7959
7917
7875
7833
7791
7749
7707
-990 401 SEGA3
-990 402 SEGB3
-990 403 SEGC3
-990 404 SEGA4
-990 405 SEGB4
-990 406 SEGC4
-990 407 SEGA5
-990 408 SEGB5
-990 409 SEGC5
-990 410 SEGA6
-910 411 SEGB6
-868 412 SEGC6
-826 413 SEGA7
-784 414 SEGB7
-742 415 SEGC7
990 416 SEGA8
990 417 SEGB8
990 418 SEGC8
990 419 SEGA9
990 420 SEGB9
990 421 SEGC9
990 422 SEGA10
990 423 SEGB10
990 424 SEGC10
990 425 SEGA11
990 426 SEGB11
990 427 SEGC11
990 428 SEGA12
990 429 SEGB12
990 430 SEGC12
990 431 SEGA13
990 432 SEGB13
990 433 SEGC13
990 434 SEGA14
990 435 SEGB14
990 436 SEGC14
990 437 SEGA15
990 438 SEGB15
990 439 SEGC15
990 440 SEGA16
990 441 SEGB16
990 442 SEGC16
990 443 SEGA17
990 444 SEGB17
990 445 SEGC17
990 446 SEGA18
990 447 SEGB18
990 448 SEGC18
990 449 SEGA19
990 450 SEGB19
7665
7623
7581
7539
7497
7455
7413
7371
7329
7287
7245
7203
7161
7119
7077
7035
6993
6951
6909
6867
6825
6783
6741
6699
6657
6615
6573
6531
6489
6447
6405
6363
6321
6279
6237
6195
6153
6111
6069
6027
5985
5943
5901
5859
5817
5775
5733
5691
5649
5607
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
990
-5-
5 Page 
NJU6820
s TERMINAL DESCRIPTION 1
No.
111-121
146-156
239-248
10,11,
42,43,
4,5,
16,17,
76,77,
158-166
168-176
177-185
187-195
196-204
271-280
282-291
293-302
304-313
315-324
326-335
337-346
348-357
228-237
217-226
260-269
249-258
206-215
19,20
7,8
Symbol
VDD
VSS
VSSH
VDDA
VSSA
VLCD
V1
V2
V3
V4
C1+
C1-
C2+
C2-
C3+
C3-
C4+
C4-
VBA
VREF
VEE
VOUT
VREG
RESb
SEL68
I/O
Power
Power
Power
Power
Power
Power/O
O
Function
Power supply for logic circuits
GND for logic circuits
GND for high voltage circuits
This terminal is internally connected to the VDD level.
•This terminal is used to fix the selection terminals to the VDD
level.
Note) Do not use this terminal for a main power supply.
This terminal is internally connected to the VSS level.
•This terminal is used to fix the selection terminals to the VSS
level.
Note) Do not use this terminal for a main GND.
LCD driving voltages
•When the internal voltage booster is not used, external LCD
driving voltages (V1 to V4 and VLCD) must be supplied on these
terminals. The external voltages must be maintained with the
following relation.
VSS<V4<V3<V2<V1<VLCD
• When the internal voltage booster is used, the LCD driving
voltages (V1 to V4 and VLCD) are enabled by the “Power control”
instruction. The capacitors between the VSS and these terminals
are necessary.
Capacitor connection terminals for the voltage booster
O Capacitor connection terminals for the voltage booster
O Capacitor connection terminals for the voltage booster
O Capacitor connection terminals for the voltage booster
O
I
Power
Power/O
O
I
I
Output of the reference-voltage generator
Input of the voltage regulator
Input of the voltage booster
•This terminal is normally connected to the VDD level.
Output of the voltage booster
Input for high voltage circuits in using external power supply
Output of the voltage regulator
Reset
Active “0”
MPU interface type select
SEL68
H
L
Status 68 series 80 series
- 11 -
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet NJU6820.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| NJU6820 | 40-common x 128RGB-Segment | New Japan Radio |
| NJU6824 | 128-common x (128+2) RGB-Segment | New Japan Radio |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |