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PDF ZL50017 Data sheet ( Hoja de datos )
| Número de pieza | ZL50017 | |
| Descripción | 1 K Digital Switch | |
| Fabricantes | Zarlink Semiconductor | |
| Logotipo |  |
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ZL50017
1 K Digital Switch
Data Sheet
Features
• 1024 channel x 1024 channel non-blocking digital
Time Division Multiplex (TDM) switch at 4.096,
8.192 or 16.384 Mbps
• 16 serial TDM input, 16 serial TDM output
streams
• Output streams can be configured as bi-
directional for connection to backplanes
• Exceptional input clock cycle to cycle variation
tolerance (20 ns for all rates)
• Per-stream input bit delay with flexible sampling
point selection
• Per-stream output bit and fractional bit
advancement
• Per-channel constant or variable throughput
delay for frame integrity and low latency
applications
• Per-channel high impedance output control
• Per-channel message mode
• Input clock: 4.096 MHz, 8.192 MHz, 16.384 MHz
• Input frame pulses:61 ns, 122 ns, 244 ns
• Control interface compatible with Intel and
Motorola 16-bit non-multiplexed buses
January 2006
Ordering Information
ZL50017GAC 256 Ball PBGA
Trays
ZL50017QCC 256 Lead LQFP Trays
ZL50017GAG2 256 Ball PBGA** Trays
**Pb Free Tin/Silver/Copper
-40°C to +85°C
• Connection memory block programming
• Supports ST-BUS and GCI-Bus standards for
input and output timing
• IEEE-1149.1 (JTAG) test port
• 3.3 V I/O with 5 V tolerant inputs; 1.8 V core
voltage
Applications
• PBX and IP-PBX
• Small and medium digital switching platforms
• Remote access servers and concentrators
• Wireless base stations and controllers
• Multi service access platforms
• Digital Loop Carriers
• Computer Telephony Integration
VDD_CORE
VDD_IO
VDD_COREA VDD_IOA
VSS
RESET
ODE
STi[15:0]
FPi
CKi
MODE_4M0
MODE_4M1
S/P Converter
Input Timing
Data Memory
Connection Memory
P/S Converter
Internal Registers &Microprocessor Interface
STio[15:0]
TMS
TDi
TDo
TCK
TRST
Figure 1 - ZL50017 Functional Block Diagram
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2004-2006, Zarlink Semiconductor Inc. All Rights Reserved.
1 page  
ZL50017
Data Sheet
List of Tables
Table 1 - Delay for Variable Delay Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 2 - Connection Memory Low After Block Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Table 3 - Address Map for Registers (A13 = 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 4 - Control Register (CR) Bits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 5 - Internal Mode Selection Register (IMS) Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Table 6 - Software Reset Register (SRR) Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 7 - Data Rate Selection Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 8 - Internal Flag Register (IFR) Bits - Read Only . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Table 9 - Stream Input Control Register 0 - 15 (SICR0 - 15) Bits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Table 10 - Stream Output Control Register 0 - 15 (SOCR0 - 15) Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table 11 - Address Map for Memory Locations (A13 = 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Table 12 - Connection Memory Low (CM_L) Bit Assignment when CMM = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 13 - Connection Memory Low (CM_L) Bit Assignment when CMM = 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
5
Zarlink Semiconductor Inc.
5 Page 
ZL50017
PBGA Pin LQFP Pin
Number
Number
A8, A9, A14,
A15, E10,
M2, N2, P2,
P16, R2,
R16, T6, T7,
T8, T9, T10,
T11, T12,
T13, T14,
T15, D16,
E16, C16,
B16, A13,
A12, A10,
A11, N1,
M1, P1, R1,
T2, T3, T5,
T4, N16,
M16, L16,
K16, H16,
J16, G16,
F16,D9, E8,
C8, E7, D6,
H5, P10,
G15, G14,
E15, F14,
H14, D11,
F15, B7, C7,
B5, J6, R3,
P6, R5, N5,
P12, N15,
P13, P15,
E1, D1, G1,
F1, J1, H1,
K1, L1, A7,
A5, A6, A4,
A3, A2, C1,
B1, E9, D8,
B8, D7
61, 62,
63, 64,
65, 66,
67, 68,
134, 135,
136, 137,
138, 139,
140, 215,
219, 225,
229, 236,
237, 125,
126, 127,
128, 129,
130, 131,
132, 253,
254, 255,
256, 1, 2,
3, 4, 75,
76, 77,
78, 119,
120, 122,
124,159,
163, 165,
167, 176,
221, 43,
102, 106,
110, 112,
100, 104,
108, 170,
172, 174,
227, 11,
12, 13,
14, 55,
56, 58,
59, 243,
244, 245,
246, 247,
248, 250,
252, 189,
190, 191,
192, 193,
194, 196,
197, 161,
164, 166,
168
Pin Name
NC
Description
No Connect
These pins MUST be left unconnected.
11
Zarlink Semiconductor Inc.
Data Sheet
11 Page | ||
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| PDF Descargar | [ Datasheet ZL50017.PDF ] | |
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