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PDF NB4L858M Data sheet ( Hoja de datos )

Número de pieza NB4L858M
Descripción Dual Differential Clock/Data 2x2 Crosspoint Switch
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NB4L858M
2.5V/3.3V, 3 GHz Dual
Differential Clock/Data 2x2
Crosspoint Switch with
CML Output and Internal
Termination
Description
The NB4L858M is a high−bandwidth low voltage fully differential
dual 2 x 2 crosspoint switch with CML outputs that is suitable for
applications such as SDH/SONET DWDM and high speed switching
applications. Design technique minimizes jitter accumulation,
crosstalk, and signal skew which make this device ideal for
loop−through and protection channel switching application. Each
2 x 2 crosspoint switch can fan out and/or multiplex up to 3 Gb/s data
and 3 GHz clock signals.
Differential inputs incorporate a pair of internal 50 W termination
resistors in a center−tapped configuration (VTDx Pins) and can accept
LVPECL (Positive ECL) or CML input signal without any external
component. This feature provides transmission line termination
on−chip, at the receiver end, eliminating external components.
Differential 16 mA CML output provides matching internal 50 W
terminations, and 400 mV output swings when externally terminated,
50 W to VCC.
The SELECT inputs are single−ended and can be driven with either
LVCMOS or LVTTL input levels. The device is housed in a low
profile 7 x 7 mm 32−pin LQFP package.
Features
Maximum Input Clock Frequency 3 GHz
Maximum Input Data Frequency 3 Gb/s
350 ps Typical Propagation Delay
80 ps Typical Rise and Fall Times
12 ps Channel to Channel Skew
0.5 ps RMS Jitter
5 ps Deterministic Jitter @ 2.5 Gb/s
Operating Range: VCC = 2.3V to 3.6 V with GND = 0 V
CML Output Level (400 mV Peak−to−Peak Output), Differential
Output
These are Pb−Free Devices
http://onsemi.com
MARKING
DIAGRAM*
LQFP−32
FA SUFFIX
CASE 873A
NB4L
858M
AWLYYWW
32
1
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G = Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
SELA0
DA0
VTDA0
DA0
50W
50W
SELA1
DA1
VTDA1
DA1
50W
50W
0
QA0
A0
QA0
1
0
QA1
A1
QA1
1
SELB0
0
DB0
VTDB0
DB0
50W
50W
QB0
B0
QB0
1
SELB1
0
DB1
VTDB1
DB1
50W
50W
QB1
B1
QB1
1
Figure 1. Functional Block Diagram
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
© Semiconductor Components Industries, LLC, 2005
December, 2005 − Rev. 9
1
Publication Order Number:
NB4L858M/D

1 page




NB4L858M pdf
NB4L858M
Table 5. DC CHARACTERISTICS, CLOCK INPUTS, CML OUTPUTS VCC = 2.3 V to 3.6 V, GND = 0 V TA = −40°C to +85°C
Symbol
Characteristic
Min Typ Max Unit
ICC
Voutdiff
Power Supply Current
CML Differential Output Swing (Note 3) No Load
Loaded 50 W to VCC
130 190 mA
640
800
1000
mV
400
VOH Output HIGH Voltage (No Load)
VOL Output LOW Voltage (No Load)
RTOUT Output Source Resistance Qx or Qx
VIH Input HIGH Voltage
VIL Input LOW Voltage
VID Differential Input Voltage (VIHD − VILD)
RTIN
Input Termination Resistance Dx or Dx to VTDx
LVTTL CONTROL INPUT PINS
VCC−40
VCC−1000
40
VCC−10
VCC−800
50
1600
1500
100
40 50
VCC
VCC−650
60
VCC
VCC−100
1600
60
mV
mV
W
mV
mV
mV
W
VIH Input HIGH Voltage (LVTTL Inputs)
VIL Input LOW Voltage (LVTTL Inputs)
IIH Input HIGH Current (LVTTL inputs)
IIL Input LOW Current (LVTTL Inputs)
2000
−10
−10
mV
800 mV
10 mA
10 mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
3. CML outputs require 50 W receiver termination resistors to VCC for proper operation.
http://onsemi.com
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