NCP3418B PDF даташит
Спецификация NCP3418B изготовлена «ON Semiconductor» и имеет функцию, называемую «MOSFET Driver». |
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Детали детали
Номер произв | NCP3418B |
Описание | MOSFET Driver |
Производители | ON Semiconductor |
логотип |
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NCP3418B
MOSFET Driver with Dual
Outputs for Synchronous
Buck Converters
The NCP3418B is a single Phase 12 V MOSFET gate driver
optimized to drive the gates of both high−side and low−side power
MOSFETs in a synchronous buck converter. The high−side and
low−side driver is capable of driving a 3000 pF load with a 25 ns
propagation delay and a 20 ns transition time.
With a wide operating voltage range, high or low side MOSFET
gate drive voltage can be optimized for the best efficiency. Internal
adaptive nonoverlap circuitry further reduces switching losses by
preventing simultaneous conduction of both MOSFETs.
The floating top driver design can accommodate VBST voltages as
high as 30 V, with transient voltages as high as 35 V. Both gate outputs
can be driven low by applying a low logic level to the Output Disable
(OD) pin. An Undervoltage Lockout function ensures that both driver
outputs are low when the supply voltage is low, and a Thermal
Shutdown function provides the IC with overtemperature protection.
The NCP3418B is pin−to−pin compatible with Analog Devices
ADP3418 with the following advantages:
Features
• Faster Rise and Fall Times
• Thermal Shutdown for System Protection
• Internal Pulldown Resistor Suppresses Transient Turn On of Either
MOSFET
• Anti Cross−Conduction Protection Circuitry
• Floating Top Driver Accommodates Boost Voltages of up to 30 V
• One Input Signal Controls Both the Upper and Lower Gate Outputs
• Output Disable Control Turns Off Both MOSFETs
• Complies with VRM10.x and VRM11.x Specifications
• Undervoltage Lockout
• Thermal Shutdown
• Thermally Enhanced Package Available
• These are Pb−Free Devices
8
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SO−8
D SUFFIX
CASE 751
MARKING
DIAGRAMS
8
3418B
ALYW
G
1
DFN−10
MN SUFFIX
CASE 485C
3418B
ALYW
G
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
PIN CONNECTIONS
1
BST
IN
OD
VCC
8
DRVH
SWN
PGND
DRVL
1
BST
IN
OD
VCC
VCC
10
DRVH
SWN
PGND
PGND
DRVL
(Top View)
ORDERING INFORMATION
Device
Package
Shipping†
NCP3418BDR2G SO−8 2500 Tape & Reel
(Pb−Free)
NCP3418BMNR2G DFN−10 3000 Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2006
March, 2006 − Rev. 5
1
Publication Order Number:
NCP3418B/D
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OD 3
IN 2
VCC
TSD
UVLO
START STOP
MIN DRVL
OFF TIMER
NCP3418B
FALLING
EDGE
DELAY
FALLING
EDGE
DELAY
NON−OVERLAP
TIMERS
MONITOR
MONITOR
Figure 1. Block Diagram
1 BST
8 DRVH
7 SWN
4 VCC
5 DRVL
6 PGND
PIN DESCRIPTION
SO−8 DFN−10 Symbol
1 1 BST
2 2 IN
3 3 OD
4 4 VCC
− 5 VCC
5 6 DRVL
6 7 PGND
− 8 PGND
7 9 SWN
8 10 DRVH
Description
Upper MOSFET Floating Bootstrap Supply. A capacitor connected between BST and SW pins holds
this bootstrap voltage for the high−side MOSFET as it is switched. The recommended capacitor value
is between 100 nF and 1.0 mF. An external diode is required with the NCP3418B.
Logic−Level Input. This pin has primary control of the drive outputs.
Output Disable. When low, normal operation is disabled forcing DRVH and DRVL low.
Input Supply. A 1.0 mF ceramic capacitor should be connected from this pin to PGND.
Input Supply. A 1.0 mF ceramic capacitor should be connected from this pin to PGND.
Output drive for the lower MOSFET.
Power Ground. Should be closely connected to the source of the lower MOSFET.
Power Ground. Should be closely connected to the source of the lower MOSFET.
Switch Node. Connect to the source of the upper MOSFET.
Output drive for the upper MOSFET.
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NCP3418B
MAXIMUM RATINGS
Rating
Value
Unit
Operating Ambient Temperature, TA
Operating Junction Temperature, TJ (Note 1)
0 to 85
0 to 150
°C
°C
Package Thermal Resistance: SO−8
Junction−to−Case, RqJC
Junction−to−Ambient, RqJA (2−Layer Board)
Package Thermal Resistance: DFN−10 (Note 2)
Junction−to−Case, RqJC (From die to exposed pad)
Junction−to−Ambient, RqJA
45 °C/W
123 °C/W
7.5 °C/W
55 °C/W
Storage Temperature Range, TS
Lead Temperature Soldering (10 sec): Reflow (SMD styles only)
Pb−Free (Note 3)
−65 to 150
260 peak
°C
°C
JEDEC Moisture Sensitivity Level
SO−8 (260 peak profile)
1
−
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
1. Internally limited by thermal shutdown, 150°C min.
2. 2 layer board, 1 in2 Cu, 1 oz thickness.
3. 60−180 seconds minimum above 237°C.
NOTE: This device is ESD sensitive. Use standard ESD precautions when handling.
MAXIMUM RATINGS
Pin Symbol
VCC
BST
Pin Name
Main Supply Voltage Input
Bootstrap Supply Voltage Input
SW
DRVH
Switching Node
(Bootstrap Supply Return)
High−Side Driver Output
DRVL
Low−Side Driver Output
IN DRVH and DRVL Control Input
OD Output Disable
PGND
Ground
NOTE: All voltages are with respect to PGND except where noted.
VMAX
15 V
30 V wrt/PGND
35 V v 50 ns wrt/PGND
15 V wrt/SW
30 V
BST + 0.3 V
35 V v 50 ns wrt/PGND
15 V wrt/SW
VCC + 0.3 V
VCC + 0.3 V
VCC + 0.3 V
0V
VMIN
−0.3 V
−0.3 V wrt/SW
−1.0 V DC
−10 V< 200 ns
−0.3 V wrt/SW
−0.3 V DC
−2.0 V < 200 ns
−0.3 V
−0.3 V
0V
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