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PDF NID5004N Data sheet ( Hoja de datos )
| Número de pieza | NID5004N | |
| Descripción | Self-Protected FET | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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NID5004N
Self−Protected FET
with Temperature and
Current Limit
40 V, 6.5 A, Single N−Channel, DPAK
Self–protected FETs are a series of power MOSFETs which utilize
ON Semiconductor HDPlust technology. The self–protected
MOSFET incorporates protection features such as integrated thermal
and current limits. The self−protected MOSFETs include an integrated
Drain−to−Gate Clamp that provides overvoltage protection from
transients and avalanche. The device is protected from Electrostatic
Discharge (ESD) by utilizing an integrated Gate−to−Source Clamp.
Features
• Short Circuit Protection
• In Rush Current Limit
• Thermal Shutdown with Automatic Restart
• Avalanche Rated
• Overvoltage Protection
• ESD Protection (4 kV HBM)
• Controlled Slew Rate for Low Noise Switching
• AEC Q101 Qualified
• This is a Pb−Free Device
Applications
• Solenoid Driver
• Relay Driver
• Small Motors
• Lighting
• Relay Replacement
• Load Switching
http://onsemi.com
VDSS
(Clamped)
40 V
RDS(on) Typ
110 mW @ 10 V
ID Typ
(Limited)
6.5 A
Drain
Gate
Input
Overvoltage
RG Protection
ESD Protection
Temperature Current Current
Limit
Limit
Sense
DPAK
CASE 369C
STYLE 2
Source
MARKING
DIAGRAM
1 YYW
2 D5
3 004NG
D5004N = Device Code
Y = Year
WW = Work Week
G = Pb−Free Device
1 = Gate
2 = Drain
3 = Source
ORDERING INFORMATION
Device
Package
Shipping†
NID5004NT4G
DPAK 2500/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2006
April, 2006 − Rev. 1
1
Publication Order Number:
NID5004N/D
1 page  
NID5004N
zl TYPICAL PERFORMANCE CURVES
8
7
VGS = 0 V
TJ = 25°C
6
5
4
3
2
1
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 7. Diode Forward Voltage vs. Current
12000
10000
VDS = 0 V
TA = 200°C
8000
6000
4000
2000
0
6 789
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 8. Input Current vs. Gate Voltage
10
12
10 VGS = 10 V
8 VGS = 5 V
6
4
Current
Limit
Temperature
Limit
2
0
0E+0
1E−3
2E−3 3E−3 4E−3 5E−3
TIME (seconds)
6E−3 7E−3
Figure 9. Short Circuit Response*
*(Actual thermal cycling response in short circuit dependent on device
power level, thermal mounting, and ambient temperature conditions)
http://onsemi.com
5
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet NID5004N.PDF ] | |
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