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PDF CDB4352 Data sheet ( Hoja de datos )
| Número de pieza | CDB4352 | |
| Descripción | Evaluation Board | |
| Fabricantes | Cirrus Logic | |
| Logotipo |  |
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CDB4352
Evaluation Board for CS4352
Features
Demonstrates Recommended Layout And
Grounding Arrangements
CS8416 Receives S/PDIF, & EIAJ-340-
Compatible Digital Audio
Headers for External PCM Audio
Requires Only a Digital Signal Source and
Power Supplies for a Complete Digital-to-
Analog Converter System
Description
The CDB4352 evaluation board is an excellent means
for quickly evaluating the CS4352 24-bit, high-perfor-
mance stereo D/A converter. Evaluation requires an
analog signal analyzer, a digital signal source, and a
power supply. Analog line-level outputs are provided via
RCA phono jacks.
The CS8416 digital audio receiver IC provides the sys-
tem timing necessary to operate the Digital-to-Analog
converter and will accept S/PDIF and EIAJ-340-com-
patible audio data. The evaluation board may also be
configured to accept external timing and data signals for
operation in a user application during system
development.
ORDERING INFORMATION
CDB4352
Evaluation Board
Hardware Switches
Clocks/Data
Header
S/PDIF Input
(CS8416)
Reset
Mux
CS4352
Reset
Analog Output
(Line Level)
Muting
http://www.cirrus.com
Copyright © Cirrus Logic, Inc. 2006
(All Rights Reserved)
SEPTEMBER '06
DS684DB1
1 page  
CDB4352
6. GROUNDING AND POWER SUPPLY DECOUPLING
As with any high-performance converter, the CS4352 requires careful attention to power supply and grounding ar-
rangements to optimize performance. Figure 32 details the connections to the CS4352 and Figures 37, 38, and 39
show the component placement and top and bottom layout. The decoupling capacitors are located as close to the
CS4352 as possible. Extensive use of ground plane fill in the evaluation board yields large reductions in radiated
noise.
7. HARDWARE CONTROL
The CDB4352 is controlled through settings on switch S1. This allows for configuration of the board without a PC.
A switch is provided for CS8416 MCLK speed, clock and data source for the board, and the hardware mode config-
uration of the CS4352.
8. ANALOG OUTPUT FILTERING
The analog output on the CDB4352 has been designed according to the CS4352 datasheet. This output circuit in-
cludes an AC coupling cap, the BJT mute circuit, and a single-pole R and C.
CONNECTOR
VL
VA_H
GND
SPDIF INPUT - J16
SPDIF INPUT - OPT1
PCM INPUT - J13
AOUTA and AOUTB
INPUT/OUTPUT
Input
Input
Input
Input
Input
Input
Output
SIGNAL PRESENT
+ 1.5 V to +3.3 V power for the CS4352 serial interface
+9 V to +12 V positive supply for the CS4352 high-voltage analog and
the CDB4352 regulators
Ground connection from power supply
Digital audio interface input via coaxial cable
Digital audio interface input via optical cable
Input for master, serial, left/right clocks and serial data
RCA line-level analog outputs
Table 1. System Connections
DS684DB1
5
5 Page 
CDB4352
JUMPER /
SWITCH
J7
J4
J5
J6
PURPOSE
Selects source of voltage for
the +5V supplies
Selects source of voltage for
the VD supplies
Selects source of voltage for
the VL supply
Selects source of voltage for
the VA supply
J8 Current measure for VD
POSITION
+5 V
*+5V_REG
VD
*+3.3V REG
VL
*+3.3V REG
VA
*+3.3V REG
*shunted
J9 Current measure for VL
*shunted
J10 Current measure for VA
*shunted
J11 Current measure for VA_H
*shunted
S1
Sets clock source, CS8416
clock speed, and CS4352 set-
tings
*1 = open
*2, 3, 4, 5 = closed
S2 Reset
-
J12
J17
Mute Disable
*LED
MUTE
FUNCTION SELECTED
Voltage source is +5 V test point (TP8)
Voltage source is +5 V regulator
Voltage source is VD test point (TP2)
Voltage source is +3.3 V regulator
Voltage source is VL binding post
Voltage source is +3.3 V regulator
Voltage source is VA test point (TP7)
Voltage source is +3.3 V regulator
When shunt is removed, the voltage can be measured
across a fixed resistance to determine current.
When shunt is removed, the voltage can be measured
across a fixed resistance to determine current.
When shunt is removed, the voltage can be measured
across a fixed resistance to determine current.
When shunt is removed, the voltage can be measured
across a fixed resistance to determine current.
position 1: 0 = external clock source, 1 = CS8416
position 2: 0 = 8416 MCLK is 256xFs, 1 = 128xFs
Position 3,4,5: see CS4352 datasheet
Enables reset for CS4352 and CS8416 when pressed
Bypasses muting to turn on LED
Normal muting circuit
*Default Factory Settings.
Table 2. CDB4352 Jumper Settings
10.DESIGN NOTE
10.1 CDB4352 Revision A.0
D2 has been removed and shorted and R2 has been removed.
The serial audio decode table for S1 is incorrect. ‘01’ should be RJ-24 and ‘10’ should be LJ
The polarity of the silkscreen for Z1, Z2, Z3, Z4, and Z5 is incorrect
The CS4352 revision is A1
10.2 CDB4352 Revision B.0
No errors at this time
DS684DB1
11
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet CDB4352.PDF ] | |
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