PDF HM51W17400 Data sheet ( Hoja de datos )

Número de pieza	HM51W17400
Descripción	(HM51W16400 / HM51W17400) Dynamic RAM
Fabricantes	Hitachi Semiconductor
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No Preview Available ! www.DataSheet4U.com HM51W16400 Series HM51W17400 Series 4,194,304-word × 4-bit Dynamic RAM ADE-203-649C (Z) Rev. 3.0 Feb. 27, 1997 Description The Hitachi HM51W16400 Series, HM51W17400 Series are CMOS dynamic RAMs organized 4,194,304- word × 4-bit. They employ the most advanced 0.5 µm CMOS technology for high performance and low power. The HM51W16400 Series, HM51W17400 Series offer Fast Page Mode as a high speed access mode. They have package variations of standard 300-mil 26-pin plastic SOJ and standard 300-mil 26-pin plastic TSOP. Features • Single 3.3 V (±0.3 V) • Access time: 50 ns/60 ns/70 ns (max) • Power dissipation  Active mode : 324 mW/288mW/252 mW (max) (HM51W16400 Series) : 360 mW/324 mW/288 mW (max) (HM51W17400 Series)  Standby mode : 7.2 mW (max) : 0.36 mW (max) (L-version) • Fast page mode capability • Long refresh period  4096 refresh cycles : 64 ms (HM51W16400 Series) : 128 ms (L-version)  2048 refresh cycles : 32 ms (HM51W17400 Series) : 128 ms (L-version) 1 page HM51W16400 Series, HM51W17400 Series Block Diagram (HM51W16400 Series) RAS CAS WE OE Timing and control A0 A1 Column • address to • • buffers A9 • • • Row address buffers A10 A11 Column decoder 4M array 4M array 4M array 4M array I/O buffers I/O1 to I/O4 5 5 Page HM51W16400 Series, HM51W17400 Series AC Characteristics (Ta = 0 to +70˚C, VCC = 3.3 V ± 0.3 V, VSS = 0 V) 1, 2, 18, 19 Test Conditions • Input rise and fall time: 5 ns • Input timing reference levels: 0.8 V, 2.0 V • Output timing reference levels: 0.8 V, 2.0 V • Output load: 1 TTL gate + CL (100 pF) (Including scope and jig) Read, Write, Read-Modify-Write and Refresh Cycles (Common parameters) HM51W16400/HM51W17400 -5 -6 -7 Parameter Symbol Min Max Min Max Min Random read or write cycle time RAS precharge time CAS precharge time RAS pulse width CAS pulse width Row address setup time Row address hold time Column address setup time Column address hold time RAS to CAS delay time RAS to column address delay time RAS hold time CAS hold time CAS to RAS precharge time OE to Din delay time OE delay time from Din CAS delay time from Din Transition time (rise and fall) tRC tRP tCP tRAS tCAS tASR tRAH tASC tCAH tRCD tRAD tRSH tCSH tCRP tOED tDZO tDZC tT 90 — 110 — 130 30 — 40 — 50 8 — 10 — 10 50 10000 60 10000 70 13 10000 15 10000 18 0—0—0 8 — 10 — 10 0—0—0 8 — 10 — 15 18 37 20 45 20 13 25 15 30 15 13 — 15 — 18 50 — 60 — 70 5—5—5 13 — 15 — 18 0—0—0 0—0—0 3 50 3 50 3 Max Unit — ns — ns — ns 10000 ns 10000 ns — ns — ns — ns — ns 52 ns 35 ns — ns — ns — ns — ns — ns — ns 50 ns Notes 3 4 5 6 6 7 11 11 Page

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PDF Descargar	[ Datasheet HM51W17400.PDF ]

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