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PDF HD74LVC2G00 Data sheet ( Hoja de datos )
| Número de pieza | HD74LVC2G00 | |
| Descripción | Dual 2-Input NAND Gate | |
| Fabricantes | Renesas Technology | |
| Logotipo |  |
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HD74LVC2G00
Dual 2–Input NAND Gate
Description
REJ03D0214–0100
Rev.1.00
Mar. 16, 2005
The HD74LVC2G00 has dual 2–input NAND gate in an 8-pin package. Low voltage and high-speed operation is
suitable for the battery powered products (e.g., notebook computers), and the low power consumption extends the
battery life.
Features
• The basic gate function is lined up as renesas uni logic series.
• Supply voltage range: 1.65 to 5.5 V
Operating temperature range: –40 to +85°C
• All inputs: VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs: VO (Max.) = 5.5 V (@VCC = 0 V)
• Output current:
±4 mA (@VCC = 1.65 V)
±8 mA (@VCC = 2.3 V)
±24 mA (@VCC = 3.0 V)
±32 mA (@VCC = 4.5 V)
• Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
HD74LVC2G00CLE
WCSP–8 pin
SXBG0008KB–A
(TBS–8AV)
Package
Abbreviation
CL
Taping Abbreviation
(Quantity)
E (3,000 pcs/reel)
Article Indication
Marking
Year code
E00YM
Month code
Rev.1.00 Mar. 16, 2005 page 1 of 7
1 page  
HD74LVC2G00
Switching Characteristics
Item
Propagation delay time
Symbol
tPLH
tPHL
Ta = –40 to 85°C
Min Max
3.7 8.6
VCC = 1.8 ± 0.15 V
Test
FROM
TO
Unit Conditions
(Input)
(Output)
ns CL = 30 pF,
RL = 1.0 kΩ
A, B
Y
Item
Propagation delay time
Symbol
tPLH
tPHL
Ta = –40 to 85°C
Min Max
1.6 4.8
VCC = 2.5 ± 0.2 V
Test
FROM
TO
Unit Conditions
(Input)
(Output)
ns CL = 30 pF,
RL = 500 Ω
A, B
Y
Item
Propagation delay time
Symbol
tPLH
tPHL
Ta = –40 to 85°C
Min Max
1.1 4.3
VCC = 3.3 ± 0.3 V
Test
FROM
TO
Unit Conditions
(Input)
(Output)
ns CL = 50 pF,
RL = 500 Ω
A, B
Y
Item
Propagation delay time
Symbol
tPLH
tPHL
Ta = –40 to 85°C
Min Max
1.0 3.3
VCC = 5.0 ± 0.5 V
Test
FROM
TO
Unit Conditions
(Input)
(Output)
ns CL = 50 pF, RL = A, B
500 Ω
Y
Operating Characteristics
Item
Power dissipation
capacitance
Symbol
CPD
VCC (V)
1.8
2.5
3.3
5.0
Ta = 25°C
Min Typ Max
— 19 —
— 19 —
— 20 —
— 22 —
Unit Test Conditions
pF f = 10 MHz
Test Circuit
From Output
Measurement point
CL* RL
Note: CL includes probe and jig capacitance.
Rev.1.00 Mar. 16, 2005 page 5 of 7
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet HD74LVC2G00.PDF ] | |
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