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W83194BR-648 Datasheet Download - Winbond

Номер произв W83194BR-648
Описание CLOCK GENERATOR
Производители Winbond
логотип Winbond логотип 

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W83194BR-648 Даташит, Описание, Даташиты
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W83194BR-648
Data Sheet
WIBOND
CLOCK GENERATOR
FOR
SIS P4 SERIES CHIPSET
Publication Release Date: April 13, 2005
- I - Revision 1.1







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W83194BR-648 Даташит, Описание, Даташиты
W83194BR-648
Table of Contents-
1. GENERAL DESCRIPTION ..........................................................................................................1
2. FEATURES ..................................................................................................................................1
3. PIN CONFIGURATION ................................................................................................................2
4. BLOCK DIAGRAM .......................................................................................................................2
5. PIN DESCRIPTION......................................................................................................................3
5.1 Crystal I/O................................................................................................................................. 3
5.2 CPU, ZCLK, SDRAM, PCI Clock Outputs............................................................................... 3
5.3 I2C Control Interface ................................................................................................................ 4
5.4 Fixed Frequency Outputs ........................................................................................................4
5.5 Power Management Pins......................................................................................................... 4
5.6 Power Pins................................................................................................................................ 5
5.7 Hardware MULTSEL0 Selects Function ................................................................................. 5
6. FREQUENCY SELECTION BY HARDWARE OR SOFTWARE .................................................6
7. I2C CONTROL AND STATUS REGISTERS ................................................................................7
7.1 Register 4: Frequency Select (Default = 00H)........................................................................ 7
7.2 Register 5: CPU, SDRAM Clock (1 = Enable, 0 = Stopped) (Default = FFH) ....................... 7
7.3 Register 6 PCI Clock (1 = Enable, 0 = Stopped) (Default = FFH) ......................................... 8
7.4 Register 7 48 MHz, ZCLK, REF Clock (1 = Enable, 0 = Stopped) (Default = FFH) ............. 8
7.5 Register 8: AGP Control (1 = Enable, 0 = Stopped) (Default = CEH) ................................... 8
7.6 Register 9: Watchdog Control (Default = 00H) ....................................................................... 9
7.7 Register 10: Watchdog Timer (Default = 08H) ....................................................................... 9
7.8 Register 11: M/N Program (Default = ABH)............................................................................ 9
7.9 Register 12: M/N Program (Default = 2FH) ..........................................................................10
7.10 Register 13: Spread Spectrum Programming (Default = 1FH) ............................................10
7.11 Register 14: Divisor and Step-less Enable Control (Default = 4CH) ...................................10
7.12 Register 15: CPU_ZCLK Skew Control (Default = A7H)......................................................11
7.13 Register 16: CPU_AGP_SKEW (Default = 1CH) .................................................................11
7.14 Register 17: Skew Control (Default = 24H)...........................................................................11
7.15 Register 18: Winbond Chip ID (Read Only) (Default = 77H)................................................12
7.16 Register 19: Winbond Chip ID (Read Only) (Default = 11H)................................................12
7.17 Ratio Selection Table .............................................................................................................13
8. ACCESS INTERFACE ...............................................................................................................14
8.1 Block Write Protocol...............................................................................................................14
8.2 Block Read Protocol...............................................................................................................14
- II -







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W83194BR-648 Даташит, Описание, Даташиты
W83194BR-648
8.3 Byte Write Protocol.................................................................................................................14
8.4 Byte Read Protocol ................................................................................................................14
9. SPECIFICATIONS .....................................................................................................................15
9.1 Absolute Maximum Ratings...................................................................................................15
9.2 General Operating Characteristics ........................................................................................15
9.3 Skew Group Timing Clock .....................................................................................................16
9.4 CPU 0.7V Electrical Characteristics ......................................................................................16
9.5 CPU 1.0V Electrical Characteristics ......................................................................................16
9.6 AGP Electrical Characteristics...............................................................................................17
9.7 PCI Electrical Characteristics.................................................................................................17
9.8 ZCLK Electrical Characteristics .............................................................................................17
9.9 SDRAM Electrical Characteristics .........................................................................................18
9.10 24M, 48M Electrical Characteristics ......................................................................................18
9.11 REF Electrical Characteristics ...............................................................................................18
10. POWER MANAGEMENT TIMING .............................................................................................19
10.1 CPU_STOP# Timing Diagram...............................................................................................19
10.2 PCI_STOP# Timing Diagram ................................................................................................19
11. ORDERING INFORMATION......................................................................................................20
12. HOW TO READ THE TOP MARKING .......................................................................................20
13. PACKAGE DRAWING AND DIMENSIONS ...............................................................................21
14. REVISION HISTORY .................................................................................................................22
- III -
Publication Release Date: April 13, 2005
Revision 1.1










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