DataSheet26.com

ZL49020 PDF даташит

Спецификация ZL49020 изготовлена ​​​​«Zarlink Semiconductor» и имеет функцию, называемую «(ZL49010 - ZL49031) Wide Dynamic Range DTMF Receiver».

Детали детали

Номер произв ZL49020
Описание (ZL49010 - ZL49031) Wide Dynamic Range DTMF Receiver
Производители Zarlink Semiconductor
логотип Zarlink Semiconductor логотип 

14 Pages
scroll

No Preview Available !

ZL49020 Даташит, Описание, Даташиты
www.DataSheet4U.com
ZL49010/1, ZL49020/1, ZL49030/1
Wide Dynamic Range DTMF Receiver
Data Sheet
Features
• Wide dynamic range (50dB) DTMF Receiver
• Call progress (CP) detection via cadence
indication
• 4-bit synchronous serial data output
• Software controlled guard time for ZL490x0
• Internal guard time circuitry for ZL490x1
• Powerdown option (ZL4901x & ZL4903x)
• 3.579MHz crystal or ceramic resonator (ZL4903x
and ZL4902x)
• External clock input (ZL4901x)
• Guarantees non-detection of spurious tones
Applications
• Integrated telephone answering machine
• End-to-end signalling
• Fax Machines
Description
The ZL490xx is a family of high performance DTMF
receivers which decode all 16 tone pairs into a 4-bit
binary code. These devices incorporate an AGC for
wide dynamic range and are suitable for end-to-end
signalling. The ZL490x0 provides an early steering
(ESt) logic output to indicate the detection of a DTMF
September 2003
Ordering Information
ZL49010DAA
ZL49011DAA
ZL49020DAA
ZL49021DAA
ZL49030DCA
ZL49030DCB
ZL49030DDA
ZL49030DDB
ZL49031DCA
ZL49031DCB
ZL49031DDA
ZL49031DDB
8 Pin PDIP Tubes
8 Pin PDIP Tubes
8 Pin PDIP Tubes
8 Pin PDIP Tubes
18 Pin SOIC Tubes
18 Pin SOIC Tape & Reel
20 Pin SSOP Tubes
20 Pin SSOP Tape & Reel
18 Pin SOIC Tubes
18 Pin SOIC Tape & Reel
20 Pin SSOP Tubes
20 Pin SSOP Tape & Reel
-40°C to +85°C
signal and requires external software guard time to
validate the DTMF digit. The ZL490x1, with preset
internal guard times, uses a delay steering (DStD)
logic output to indicate the detection of a valid DTMF
digit. The 4-bit DTMF binary digit can be clocked out
synchronously at the serial data (SD) output. The SD
pin is multiplexed with call progress detector output. In
the presence of supervisory tones, the call progress
1
PWDN
VDD
VSS
Voltage
Bias Circuit
AGC
Anti-
alias
Filter
Dial
Tone
Filter
2
OSC2
OSC1
(CLK)
Oscillator
and
Clock
Circuit
To All Chip Clocks
1. ZL49010/1 and ZL49030/1 only.
2. ZL49020/1 and ZL49030/1 only.
3. ZL490x1 only.
High
Group
Filter
Low
Group
Filter
Steering
Circuit
Digital
Detector
Algorithm
Code
Converter
and
Latch
Energy
Detection
Figure 1 - Functional Block Diagram
Digital
Guard
Time3
Parallel to
Serial
Converter
& Latch
Mux
ESt
or
DStD
ACK
SD
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2003, Zarlink Semiconductor Inc. All Rights Reserved.









No Preview Available !

ZL49020 Даташит, Описание, Даташиты
ZL49010/1, ZL49020/1, ZL49030/1
Data Sheet
detector circuit indicates the cadence (i.e., envelope) of the tone burst. The cadence information can then be
processed by an external microcontroller to identify specific call progress signals. The ZL4902x and ZL4903x can
be used with a crystal or a ceramic resonator without additional components. A power-down option is provided for
the ZL4901x and ZL4903x.
ZL49010/1
ZL49020/1
INPUT
PWDN
CLK
VSS
1
2
3
4
8 VDD INPUT 1
7
ESt/
DStD
OSC2
2
6 ACK OSC1 3
5 SD VSS 4
8
7
6
5
8 PIN PLASTIC DIP
VDD
ESt/
DStD
ACK
SD
ZL49030/1
NC
INPUT
PWDN
OSC2
NC
OSC1
NC
NC
VSS
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
VDD
NC
NC
ESt/DStD
NC
ACK
NC
SD
NC
NC
NC
INPUT
PWDN
NC
OSC2
OSC1
VSS
NC
NC
18 PIN PLASTIC SOIC
ZL49030/1
1 20
2 19
3 18
4 17
5 16
6 15
7 14
8 13
9 12
10 11
20 PIN SSOP
NC
NC
VDD
NC
ESt/DStD
NC
ACK
SD
NC
NC
Figure 2 - Pin Connections
Pin Description
4903x
2
4
6
Pin #
4902x
1
2
3
94
11 5
13 6
15 7
4901x
1
-
3
4
5
6
7
Name
Description
INPUT
OSC2
OSC1
(CLK)
VSS
SD
ACK
ESt
(ZL490x0)
DTMF/CP Input. Input signal must be AC coupled via capacitor.
Oscillator Output.
Oscillator/Clock Input. This pin can either be driven by:
1) an external digital clock with defined input logic levels. OSC2
should be left open.
2) connecting a crystal or ceramic resonator between OSC1 and
OSC2 pins.
Ground. (0V)
Serial Data/Call Progress Output. This pin serves the dual function
of being the serial data output when clock pulses are applied after
validation of DTMF signal, and also indicates the cadence of call
progress input. As DTMF signal lies in the same frequency band as
call progress signal, this pin may toggle for DTMF input. The SD pin
is at logic low in powerdown state.
Acknowledge Pulse Input. After ESt or DStD is high, applying a
sequence of four pulses on this pin will then shift out four bits on the
SD pin, representing the decoded DTMF digit. The rising edge of the
first clock is used to latch the 4-bit data prior to shifting. This pin is
pulled down internally. The idle state of the ACK signal should be
low.
Early Steering Output. A logic high on ESt indicates that a DTMF
signal is present. ESt is at logic low in powerdown state.
DStD Delayed Steering Output. A logic high on DStD indicates that a
(ZL490x1) valid DTMF digit has been detected. DStD is at logic low in
powerdown state.
2
Zarlink Semiconductor Inc.









No Preview Available !

ZL49020 Даташит, Описание, Даташиты
ZL49010/1, ZL49020/1, ZL49030/1
Data Sheet
Pin Description (continued)
4903x
18
Pin #
4902x
8
1,5,7,8,
10, 12,
14,16,
17
3
-
-
4901x
8
-
2
Name
Description
VDD Positive Power Supply (5V Typ.) Performance of the device can be
optimized by minimizing noise on the supply rails. Decoupling
capacitors across VDD and VSS are therefore recommended.
NC No Connection. Pin is unconnected internally.
PWDN
Power Down Input. A logic high on this pin will power down the
device to reduce power consumption. This pin is pulled down
internally and can be left open if not used. ACK pin should be at logic
’0’ to power down device.
Device
Type
ZL49010
ZL49011
ZL49020
ZL49021
ZL49030
ZL49031
8 Pin
18 Pin 20 Pin PWDN
2 Pin
OSC
Ext
CLK
x xx
x xx
x xx
x xx
xxxxx
xxxxx
Table 1 - Summary of ZL490x0/1 Product Family
ESt DStD
x
x
x
x
x
x
Functional Description
The ZL490xxs are high performance and low power consumption DTMF receivers. These devices provide wide
dynamic range DTMF detection and a serial decoded data output. These devices also incorporate an energy
detection circuit. An input voiceband signal is applied to the devices via a series decoupling capacitor. Following
the unity gain buffering, the signal enters the AGC circuit followed by an anti-aliasing filter. The bandlimited output
is routed to a dial tone filter stage and to the input of the energy detection circuit. A bandsplit filter is then used to
separate the input DTMF signal into high and low group tones. The high group and low group tones are then
verified and decoded by the internal frequency counting and DTMF detection circuitry. Following the detection
stage, the valid DTMF digit is translated to a 4-bit binary code (via an internal look-up ROM). Data bits can then be
shifted out serially by applying external clock pulses.
Automatic Gain Control (AGC) Circuit
As the device operates on a single power supply, the input signal is biased internally at approximately VDD/2. With
large input signal amplitude (between 0 and approximately -30dBm for each tone of the composite signal), the AGC
is activated to prevent the input signal from being clipped. At low input level, the AGC remains inactive and the
input signal is passed directly to the hardware DTMF detection algorithm and to the energy detection circuit.
Filter and Decoder Section
The signal entering the DTMF detection circuitry is filtered by a notch filter at 350 and 440 Hz for dial tone rejection.
The composite dual-tone signal is further split into its individual high and low frequency components by two 6th
order switched capacitor bandpass filters. The high group and low group tones are then smoothed by separate
3
Zarlink Semiconductor Inc.










Скачать PDF:

[ ZL49020.PDF Даташит ]

Номер в каталогеОписаниеПроизводители
ZL49020(ZL49010 - ZL49031) Wide Dynamic Range DTMF ReceiverZarlink Semiconductor
Zarlink Semiconductor
ZL49021(ZL49010 - ZL49031) Wide Dynamic Range DTMF ReceiverZarlink Semiconductor
Zarlink Semiconductor

Номер в каталоге Описание Производители
TL431

100 мА, регулируемый прецизионный шунтирующий регулятор

Unisonic Technologies
Unisonic Technologies
IRF840

8 А, 500 В, N-канальный МОП-транзистор

Vishay
Vishay
LM317

Линейный стабилизатор напряжения, 1,5 А

STMicroelectronics
STMicroelectronics

DataSheet26.com    |    2020    |

  Контакты    |    Поиск