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PDF 74FST3244 Data sheet ( Hoja de datos )
| Número de pieza | 74FST3244 | |
| Descripción | 8-Bit Bus Switch | |
| Fabricantes | ON Semiconductor | |
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74FST3244
8−Bit Bus Switch
The ON Semiconductor 74FST3244 is an 8−bit, high performance
switch. The device is CMOS TTL compatible when operating between
4 and 5.5 Volts. The device exhibits extremely low RON and adds
nearly zero propagation delay. The device adds no noise or ground
bounce to the system.
The device consists of two 4−bit switches with separate
Output/Enable (OE) pins. Port A is connected to Port B when OE is
low. If OE is high, the switch is high Z.
Features
• RON t 4 W Typical
• Less Than 0.25 ns−Max Delay Through Switch
• Nearly Zero Standby Current
• No Circuit Bounce
• Control Inputs are TTL/CMOS Compatible
• Pin−For−Pin Compatible with QS3244, FST3244, CBT3244
• All Popular Packages: QSOP−20, TSSOP−20, SOIC−20
• All Devices in Package TSSOP are Inherently Pb−Free*
OE1
1A0
2B3
1A1
2B2
1A2
2B1
1A3
2B0
GND
1
2
3
4
5
6
7
8
9
10
20 VCC
19 OE2
18 1B0
17 2A3
16 1B1
15 2A2
14 1B2
13 2A1
12 1B3
11 2A0
Figure 1. 20−Lead Pinout
TRUTH TABLE
Inputs
OE1
OE2
LL
LH
HL
HH
Inputs/Outputs
1A, 1B
2A, 2B
1A = 1B
1A = 1B
Z
Z
2A = 2B
Z
2A = 2B
Z
http://onsemi.com
20
1
SOIC−20
DW SUFFIX
CASE 751D
MARKING
DIAGRAMS
20
FST3244
AWLYYWW
1
20
1
TSSOP−20
DT SUFFIX
CASE 948E
20
FST
3244
ALYW
1
20
1
QSOP−20
QS SUFFIX
CASE 492A
20
FST3244
AWLYWW
1
A
L, WL
Y
W, WW
=
=
=
=
PIN NAMES
Pin
OE1, OE2
1A, 2A
1B, 2B
Assembly Location
Wafer Lot
Year
Work Week
Description
Bus Switch Enables
Bus A
Bus B
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
June, 2006 − Rev. 2
1
Publication Order Number:
74FST3244/D
1 page  
74FST3244
AC Loading and Waveforms
FROM
OUTPUT
UNDER
TEST
VI
500 W
CL* 500 W
NOTES:
1. Input driven by 50 W source terminated in 50 W.
2. CL includes load and stray capacitance.
*CL = 50 pF
Figure 3. AC Test Circuit
SWITCH
INPUT
10 %
tPLH
tf = 2.5 nS
90 %
1.5 V
90 %
1.5 V
OUTPUT
1.5 V
tf = 2.5 nS
3.0 V
10 %
tPLH
GND
VOH
1.5 V
VOL
Figure 4. Propagation Delays
ENABLE
INPUT
tf = 2.5 nS
90 %
1.5 V
tPZL
OUTPUT
tPZH
OUTPUT
10 % 10 %
1.5 V
1.5 V
tf = 2.5 nS
90 % 3.0 V
1.5 V
GND
tPZL
VOL + 0.3 V
VOL
tPHZL
VOH
VOH − 0.3 V
Figure 5. Enable/Disable Delays
http://onsemi.com
5
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| PDF Descargar | [ Datasheet 74FST3244.PDF ] | |
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