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PDF WGCE5038 Data sheet ( Hoja de datos )
| Número de pieza | WGCE5038 | |
| Descripción | DVB-S2 Advanced Modulation Satellite Tuner | |
| Fabricantes | Intel | |
| Logotipo |  |
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CE5038
DVB-S2 Advanced Modulation
Satellite Tuner
Data Sheet
Features
• Single-chip L band to zero IF quadrature down
converter compliant with 1-45 Msps DVB-S2
• High dynamic range of -92 dBm to -10 dBm
without RF attenuator or RSSI
• High total composite power handling
• Excellent immunity to adjacent channel
interference through programmable and
autocalibrated channel filters
• Integrated power and forget LO oscillators
• 2 degree integrated phase jitter enables excellent
performance for 8 PSK and 16 QAM applications
• Less than +/- 3° and +/-0.6 dB I/Q quadrature
balance
• Integrated RF loop through for cascaded tuner
applications
• Power saving mode
February 2006
Ordering Information
HGCE5038 882068
WGCE5038 882129
HGCE5038 S L9F8 882067
WGCE5038 S L9FY 882071
40-pin QFN Trays
40-pin QFN* Trays
40-pin QFN Tape & Reel
40-pin QFN* Tape & Reel
*Pb free
Applications
• Advanced modulation DVB-S and DSS satellite
receivers requiring upgrade for DVB-S2,
8 PSK / 16 QAM
Figure 1 - Block Diagram
1
Intel Corporation
D55746-001
Intel and the Intel logo are registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries.
*Other names and brands may be claimed as the property of others. Copyright © 2006 Intel Corporation. All rights reserved.
1 page  
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CE5038
Data Sheet
Table of Contents
4.2 Changing Channel. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4.3 Symbol Rate and Filter Calculations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4.3.1 Determining the Filter Bandwidth from the Symbol Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4.3.2 Calculating the Filter Bandwidth. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
4.3.3 Determining the Values of BF and BR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
4.3.4 Filter Bandwidth Programming Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
4.4 Programming Sequence for Filter Bandwidth Changes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.0 Application Notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
5.1 Thermal Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
5.2 Crystal Oscillator Notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
6.0 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
6.1 Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
6.2 Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
6.3 Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
6.4 DC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
6.5 AC Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
4
Intel Corporation
5 Page 
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Pin Symbol Direction
CE5038
Function
24 P0
Switching port P0.
Out ‘0’ = disabled (high impedance).
‘1’ = enabled.
Data Sheet
Schematics
P0/P1
25 LOCK
26 VccRF
Output which indicates that phase
comparator phase and frequency lock
Out has been obtained and that the varactor
voltage is within ‘tune unlock’ window.
This powers up in logic ‘0’ state.
+5 v voltage supply for RF
RF Bypass differential outputs.
27 RFBYPASS
Out
AC couple outputs. Matching circuitry as
per applications diagram (Figure 2).
28 RFBYPASS Out In applications where RF Bypass is not
required, pins should not be connected.
29 VccRF
30 N/C
+5 v voltage supply for RF
Not connected. Ground externally.
31 RFIN
32 RFIN
33 N/C
In RF differential inputs.
AC couple input.
Matching circuitry as per applications
In diagram.
Not connected. Ground externally.
34 RFAGC
In RF analogue gain control input
LOCK
CMOS Digital Output
VccRF
Vref
5k
RFAGC
20k
10
Intel Corporation
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet WGCE5038.PDF ] | |
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