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PDF NB7L86M Data sheet ( Hoja de datos )
| Número de pieza | NB7L86M | |
| Descripción | 12 Gb/s Differential Clock/Data SmartGate | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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NB7L86M
2.5V/3.3V 12 Gb/s Differential
Clock/Data SmartGate with
CML Output and Internal
Termination
The NB7L86M is a multi−function differential Logic Gate, which
can be configured as an AND/NAND, OR/NOR, XOR/XNOR, or 2:1
MUX. This device is part of the GigaComm family of high
performance Silicon Germanium products. The NB7L86M is an
ultra−low jitter multi−logic gate with a maximum data rate of 12 Gb/s
and input clock frequency of 8 GHz suitable for Data Communication
Systems, Telecom Systems, Fiber Channel, and GigE applications.
Differential inputs incorporate internal 50 W termination resistors
and accept LVNECL (Negative ECL), LVPECL (Positive ECL),
LVCMOS, LVTTL, CML, or LVDS. The differential 16 mA CML
output provides matching internal 50 W termination, and 400 mV
output swing when externally terminated 50 W to VCC.
The device is housed in a low profile 3x3 mm 16−pin QFN package.
Application notes, models, and support documentation are available
on www.onsemi.com.
Features
• Maximum Input Clock Frequency up to 8 GHz
• Maximum Input Data Rate up to 12 Gb/s Typical
• < 0.5 ps of RMS Clock Jitter
• < 10 ps of Data Dependent Jitter
• 30 ps Typical Rise and Fall Times
• 90 ps Typical Propagation Delay
• 2 ps Typical Within Device Skew
• Operating Range: VCC = 2.375 V to 3.465 V with VEE = 0 V
• CML Output Level (400 mV Peak−to−Peak Output) Differential Output
• 50 W Internal Input and Output Termination Resistors
• Functionally Compatible with Existing 2.5 V/3.3 V LVEL, LVEP, EP
and SG Devices
• These are Pb−Free Devices
VTD0
D0
50 W
D0
VTD0
50 W
VTD1
D1
50 W
http://onsemi.com
1
QFN16
MN SUFFIX
CASE 485G
MARKING
DIAGRAM*
16
1
NB7L
86M
ALYWG
G
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
Q
Q
D1
VTD1
50 W
50 W 50 W
VTSEL
SEL SEL
Figure 1. Simplified Logic Diagram
© Semiconductor Components Industries, LLC, 2012
March, 2012 − Rev. 7
1
Publication Order Number:
NB7L86M/D
1 page  
NB7L86M
Table 8. DC CHARACTERISTICS (VCC = 2.375 V to 3.465 V, VEE = 0 V, TA = −40°C to +85°C)
Symbol
Characteristic
Min
Typ
Max Unit
ICC Power Supply Current (Inputs and Outputs Open)
VOH Output HIGH Voltage (Notes 9 and 10)
VOL Output LOW Voltage (Notes 9 and 10)
Differential Input Driven Single−Ended (see Figures 16 & 18)
VCC − 60
VCC − 460
38
VCC − 30
VCC − 400
50
VCC
VCC − 310
mA
mV
mV
Vth Input Threshold Reference Voltage Range (Note 11)
VIH Single−ended Input HIGH Voltage (Note 12)
VIL Single−ended Input LOW Voltage (Note 12)
Differential Inputs Driven Differentially (see Figures 17 & 19)
1125
Vth + 75
VEE
VCC − 75
VCC
VCC − 150
mV
mV
mV
VIHD
VILD
VCMR
VID
IIH
Differential Input HIGH Voltage
Differential Input LOW Voltage
Input Common Mode Range (Differential Configuration)
Differential Input Voltage (VIHD − VILD)
Input HIGH Current
D0/D0/D1/D1
SEL/SEL
1200
VEE
1163
75
0
0
VCC
VCC − 75
VCC – 38
2500
mV
mV
mV
mV
50 150 mA
20 150
IIL Input LOW Current
D0/D0/D1/D1
−50
50
100 mA
SEL/SEL
−50
20
100
RTIN
Internal Input Termination Resistor
45 50 55 W
RTOUT
Internal Output Termination Resistor
45 50 55 W
RTemp Coef Internal I/O Termination Resistor Temperature Coefficient
6.38 mW/°C
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board
with maintained airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range.
Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually
under normal operating conditions and not valid simultaneously.
9. CML outputs require 50 W receiver termination resistors to VCC for proper operation.
10. Input and output parameters vary 1:1 with VCC.
11. Vth is applied to the complementary input when operating in single−ended mode.
12. VCMR min varies 1:1 with VEE, VCMR max varies 1:1 with VCC.
http://onsemi.com
5
5 Page 
NB7L86M
ORDERING INFORMATION
Device
Package
Shipping†
NB7L86MMNG
QFN−16
(Pb−Free)
123 Units/Rail
NB7L86MMNR2G
QFN−16
(Pb−Free)
3000 Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
http://onsemi.com
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet NB7L86M.PDF ] | |
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