PDF WM8711BL Data sheet ( Hoja de datos )

Número de pieza	WM8711BL
Descripción	Ultra-Small Audio DAC
Fabricantes	Wolfson Microelectronics
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No Preview Available ! w WM8711BL Ultra-Small Audio DAC with Headphone Amplifier DESCRIPTION The WM8711BL is an ultra-small, low power stereo DAC with an integrated headphone driver. It is designed specifically for portable audio systems requiring hi-fi stereo playback through headphones. Stereo 24-bit multi-bit sigma delta DACs are used with oversampling digital interpolation filters. Digital audio input word lengths from 16-32 bits and sampling rates from 8kHz to 96kHz are supported. Stereo audio outputs are buffered for driving headphones from a programmable volume control, line level outputs are also provided along with anti-thump mute and power up/down circuitry. The device is controlled via a 2 or 3 wire serial interface. The interface provides access to all features including volume controls, mutes, de-emphasis and extensive power management facilities. The device is available in an ultra- small 24-lead QFN (4x4x0.9 mm Body) package. A USB clocking mode is provided where all audio rates can be derived from a single 12MHz or 24MHz MCLK, saving on the need for a PLL or multiple crystals. BLOCK DIAGRAM FEATURES  Audio Performance - DAC SNR 97dB (‘A’ weighted) at AVDD = 3.3V - DAC SNR 90dB (‘A’ weighted) at AVDD = 1.8V  Low Power Headphone Playback - Down to 6mW at 1.8V - 1.42 – 3.6V Digital Supply Operation - 1.8 – 3.6 V Analogue Supply Operation  DAC Sampling Frequency: 8kHz – 96kHz  2 or 3-Wire MPU Serial Control Interface  Programmable Audio Data Interface Modes - I2S, Left, Right Justified or DSP - 16/20/24/32 bit Word Lengths - Master or Slave Clocking Mode  Stereo Audio Outputs  Output Volume and Mute Controls  Highly Efficient Headphone Driver  24-lead QFN (4x4x0.9 mm) package APPLICATIONS  Multimedia Mobile Phones  Portable MP3 / CD Players WM8711B CONTROL INTERFACE DACDAT DACLRC BCLK DIGITAL FILTERS MUTE DAC DAC OSC CLKIN DIVIDER (Div x1, x2) CLKIN DIVIDER (Div x1, x2) MUTE VOL/ MUTE +6 to -73dB 1 dB Steps H/P DRIVER +6 to -73dB 1 dB Steps VOL/ MUTE H/P DRIVER HPVDD HPGND RLINEIN RHPOUT ROUT LOUT LHPOUT LLINEIN WOLFSON MICROELECTRONICS plc To receive regular email updates, sign up at http://www.wolfsonmicro.com/enews Production Data, December 2011, Rev 4.2 Copyright 2011 Wolfson Microelectronics plc 1 page Production Data WM8711BL ABSOLUTE MAXIMUM RATINGS Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical Characteristics at the test conditions specified. ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically susceptible to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage of this device. Wolfson tests its package types according to IPC/JEDEC J-STD-020B for Moisture Sensitivity to determine acceptable storage conditions prior to surface mount assembly. These levels are: MSL1 = unlimited floor life at <30C / 85% Relative Humidity. Not normally stored in moisture barrier bag. MSL2 = out of bag storage for 1 year at <30C / 60% Relative Humidity. Supplied in moisture barrier bag. MSL3 = out of bag storage for 168 hours at <30C / 60% Relative Humidity. Supplied in moisture barrier bag. CONDITION MIN MAX Digital supply voltage -0.3V +3.63V Analogue supply voltage -0.3V +3.63V Voltage range digital inputs DGND -0.3V DVDD +0.3V Voltage range analogue inputs AGND -0.3V AVDD +0.3V Operating temperature range, TA Storage temperature after soldering -25C -65C +85C +150C Notes: 1. Analogue and digital grounds must always be within 0.3V of each other. 2. The digital supply core voltage (DCVDD) must always be less than or equal to the analogue supply voltage (AVDD) 3. DCVDD must always be less than or equal to DBVDD RECOMMENDED OPERATING CONDITIONS PARAMETER Digital supply range (Core) Digital supply range (Buffer) Analogue supply range Ground SYMBOL DCVDD DBVDD AVDD, HPVDD DGND,AGND,HPGND TEST CONDITIONS MIN 1.42 1.8 1.8 TYP MAX UNIT 3.6 V 3.6 V 3.6 V 0V w PD, Rev 4.2, December 2011 543 5 Page Production Data DIGITAL AUDIO INTERFACE – SLAVE MODE BCLK (Input) tBCH tBCY tBCL DACLRC (Input) DACDAT tDS tLRH tDH tLRSU WM8711BL Figure 3 Digital Audio Data Timing – Slave Mode Test Conditions AVDD, HPVDD, DVDD = 3.3V, AGND = 0V, DCVDD = 1.5V, DGND = 0V, TA = +25oC, slave mode, fs = 48kHz, MCLK = 256fs unless otherwise stated. PARAMETER SYMBOL Audio Data Input Timing Information BCLK cycle time BCLK pulse width high tBCY tBCH BCLK pulse width low tBCL DACLRC set-up time to BCLK rising edge tLRSU DACLRC hold time from BCLK rising edge tLRH DACDAT set-up time to BCLK rising edge tDS DACDAT hold time from BCLK rising edge tDH TEST CONDITIONS MIN TYP MAX UNIT 50 ns 20 ns 20 ns 10 ns 10 ns 10 ns 10 ns MPU INTERFACE TIMING CSB SCLK tCSL tSCY tSCH tSCL tCSH tSCS tCSS SDIN tDSU tDHO LSB Figure 4 Program Register Input Timing - 3-Wire MPU interface Timing w PD, Rev 4.2, December 2011 1143 11 Page

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