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PDF WM8753L Data sheet ( Hoja de datos )

Número de pieza WM8753L
Descripción Hi-Fi and Telephony Dual CODEC
Fabricantes Wolfson Microelectronics 
Logotipo Wolfson Microelectronics Logotipo



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WM8753L
Hi-Fi and Telephony Dual CODEC
DESCRIPTION
The WM8753L is a low power, high quality stereo CODEC
with integrated Voice CODEC designed for portable digital
telephony applications such as mobile phone, or headset
with hi-fi playback capability.
The device integrates dual interfaces to two differentially
connected microphones, and includes drivers for speakers,
headphone and earpiece. External component requirements
are reduced as no separate microphone or headphone
amplifiers are required, and Cap-less connections can be
made to all loads. Advanced on-chip digital signal
processing performs tone control, Bass Boost and automatic
level control for the microphone or line input through the
ADC. The two ADCs may be used to support Voice noise
cancellation in a partnering DSP, or for stereo recording.
The WM8753L hi-fi DAC can operate as a master or a slave,
with various master clock frequencies including 12 or
24MHz for USB devices, 13MHz or 19.2MHz for cellular
systems, or standard 256fs rates like 12.288MHz and
24.576MHz. Internal PLLs generate all required clocks for
both Voice and hi-fi converters. If audio system clocks
already exist, the PLLs may be committed to alternative
uses.
The WM8753L operates at a nominal supply voltage of 2V,
although the digital core can operate at voltages down to
1.42V to save power, and the maximum for all supplies is
3.6 Volts. Different sections of the chip can also be powered
down under software control.
FEATURES
Hi-fi DAC: interfaced over I2S type link
Audio sample rates:
8, 11.025, 16, 22.05, 24, 32, 44.1, 48, 88.2, 96
DAC SNR 98dB, THD -84dB (‘A’ weighted @ 48kHz)
ADC SNR 95dB, THD -82dB (‘A’ weighted @ 48kHz)
On-chip Headphone Driver with cap-less output option
- 40mW output power on 16/ 3.3V
- with 16load: SNR 90dB, THD –75dB
- with 10kload: SNR 94dB, THD –90dB
On-chip speaker driver with 0.5W into 8R
Voice CODEC: interfaced over Voice interface
supports sample rates from 8ks/s to 48ks/s
ADC and DAC SNR 82dB, THD -74dB
Two Differential Microphone Interfaces
- Dual ADCs support noise cancellation in external DSP
- Programmable ALC / Noise Gate
Low-noise bias supplied for electret microphones
Other Features
On-chip PLLs supporting 12, 13, 19.2MHz and other clocks
Cap-less connection options to headphones, earpiece, spkr.
Low power, low voltage
- 1.8V to 3.6V (digital core: 1.42V to 3.6V)
- power consumption <20mW all-on with 2V supplies
- <12mW for PCM CODEC operation
7x7x0.9mm QFN package
APPLICATIONS
MP3 Player / Recorder mobile phone
Bluetooth stereo headset
WOLFSON MICROELECTRONICS plc
To receive regular email updates, sign up at http://www.wolfsonmicro.com/enews
Production Data, November 2011, Rev 4.2
Copyright 2011 Wolfson Microelectronics plc

1 page




WM8753L pdf
WM8753L
Production Data
PIN DESCRIPTION
QFN
NAME
TYPE
DESCRIPTION
1
VXDOUT
Digital Output
Voice ADC Output
2
VXCLK
Digital Input/Output
Voice CODEC data clock / ADC frame clock
3
VXFS
Digital Input/Output
Voice CODEC Frame Sync
4
LRC
Digital Input/Output
DAC Frame Sync
5
BCLK
Digital Input/Output
DAC data clock input / output
6
ADCDAT
Digital Output
ADC Digital Audio Data Alternative Output
7
DACDAT
Digital Input
DAC Digital Audio Data Input
8
MCLK
Digital Input
Master Clock Input
9
DBVDD
Supply
Digital Buffer Supply (supply for digital I/O buffers)
10
DCVDD
Supply
Digital Core Supply (supply for digital logic, except I/O buffers)
11
DGND
Supply
Digital ground (all digital logic)
12
PCMCLK
Digital Input
VOICE CODEC master clock input (may be looped from PLL
output)
13
GP2/CLK2
Digital Output
General Purpose Output 2, usually PLL2 output
14
GP1/CLK1
Digital Output
General Purpose Output 1, usually PLL1 output
15
PGND
Supply
PLL ground
16
PVDD
Supply
PLL Supply
17
HPVDD
Supply
Headphone Supply
18
OUT4
Analogue Output
Analogue Output 4 (Headphone driver)
19
OUT3
Analogue Output
Analogue Output 3 (Headphone driver)
20
ROUT1
Analogue Output
Headphone Output Right
21
LOUT1
Analogue Output
Headphone Output Left
22 HP/SPKRGND Supply
Headphone and Speaker ground
23
ROUT2
Analogue Output
Speaker Output Right
24
LOUT2
Analogue Output
Speaker Output Left
25
SPKRVDD
Supply
Speaker Supply
26
MONO2
Analogue Output
Mono analogue output 2
27
MONO1
Analogue Output
Mono analogue output 1
28
AVDD
Supply
Analogue supply (feeds ADC and DAC)
29
AGND
Supply
Analogue ground (feeds ADC and DAC)
30
VREF
Reference
Buffered ADC and DAC Reference voltage
31
VMID
Reference
Decoupling for ADC and DAC reference voltage
32
MICBIAS
Analogue Output
Microphone Bias
33
ACIN
Analogue Input
AC coupled input to ALC PGA in record path
34
ACOP
Analogue Output
ALC Mix output
35
LINE1
Analogue Input
Left Channel Input
36
LINE2
Analogue Input
Right Channel input
37
RXP
Analogue Input
RX mono differential input positive signal
38
RXN
Analogue Input
RX mono differential input negative signal
39
MIC1
Analogue Input
Mic Pre-amp input 1
40
MIC1N
Analogue Input
Mic Pre-amp 1 common mode or negative input
41
MIC2
Analogue Input
Mic Pre-amp input 2
42
MIC2N
Analogue Input
Mic Pre-amp 2 common mode or negative input
43
GPIO4
Digital input/Output
GPIO (General Purpose input/output) usually headphone jack insert
autodetect with selectable pull-up/pull-down.
44 MODE/GPIO3 Digital Input / Output Control interface Mode select on reset or GPIO3
45
CSB/GPIO5
Digital Input / Output 3-wire MPU Chip Select / 2-wire MPU interface address selection or
GPIO5
46
SDIN
Digital Input / Output 3-wire MPU Data Input / 2-wire MPU Date Input / Acknowledge
47
SCLK
Digital Input
3-wire MPU Clock Input / 2-wire MPU Clock Input
48
VXDIN
Digital Input
VOICE DAC Input
Note: 1. It is recommended that the QFN ground paddle is connected to analogue ground on the application PCB
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PD, Rev 4.2, November 2011
5

5 Page





WM8753L arduino
WM8753L
Production Data
POWER CONSUMPTION
The power consumption of the WM8753L depends on the following factors.
Supply voltages: Reducing the supply voltages also reduces supply currents, and therefore results in
significant power savings.
Operating mode: Power consumption is lower in mono modes than in stereo, as one ADC / DAC /
PGA is switched OFF. It is also reduced when the device is used for playback only (ADC off) or for
recording only (DAC off). Unused outputs should be switched off (for example, when line out is not
used, do not enable the LINE outputs).
Headphone volume: At high volume, the power dissipated in the headphone itself is greater than the
power consumption of the WM8753L. High headphone volume also increases the power consumption
of the on-chip headphone drivers.
Off
Off with temp sensor disabled
Standby (500k VMID, no clocks, temp sensor off)
Stereo 16R HP playback 44.100k, MCLK=13MHz, PLL enabled, quiescent
Stereo 16R HP playback 44.100k, MCLK=13MHz, PLL enabled,
100mVrms
Stereo 16R HP playback 44.100k, MCLK=256fs, quiescent
Stereo 16R HP playback 44.100k, MCLK=256fs, 100mVrms
Stereo 16R HP playback 44.100k, MCLK=256fs, 565mVrms = 20mW
Stereo 16R HP playback 44.100k, MCLK=256fs, 565mVrms = 20mW
Stereo 16R HP playback 44.100k, MCLK=256fs, 462mVrms = 13.3mW
Stereo 16R HP playback 44.100k, MCLK=256fs, 308mVrms = 5.9mW
PCM voice call (Right ADC, diff rec from mic2, VDAC playback to 16R, 64x
OSR, 8kHz, MCLK=256fs)
AVDD
(V)
3.3
3.3
1.8
3.3
3.3
1.8
3.3
3.3
1.8
3.3
3.3
2.7
1.8
3.3
3.3
2.7
1.8
3.3
3.3
2.7
1.8
3.3
3.3
2.7
1.8
3.3
3.3
2.7
1.8
3.3
3.3
2.7
1.8
IAVDD DCVDD
(mA)
(V)
0.018
1.8
0.018
2.7
0.007
1.8
0 1.8
0 2.7
0 1.8
0.004
1.8
0.004
2.7
0.002
1.8
4.38 1.8
4.38 1.8
3.48 1.8
2.22 1.5
4.34 1.8
4.33 1.8
3.48 1.8
2.22 1.5
4.35 1.8
4.33 1.8
3.48 1.8
2.23 1.5
4.35 1.8
4.33 1.8
3.46 1.8
2.23 1.5
4.35 1.8
4.34 1.8
3.48 1.8
2.25 1.5
5.18 1.8
5.18 1.8
4.4 1.8
3.15 1.5
IDCVDD DBVDD
(mA)
(V)
0.007
3.3
0.009
2.7
0.007
1.8
0.007
3.3
0.009
2.7
0.007
1.8
0.007
3.3
0.009
2.7
0.007
1.8
2.9 3.3
2.9 1.8
2.87 1.8
2.35 1.8
2.9 3.3
2.9 1.8
2.85 1.8
2.36 1.8
2.43 3.3
2.42 1.8
2.42 1.8
1.97 1.8
2.43 3.3
2.42 1.8
2.42 1.8
1.97 1.8
2.43 3.3
2.46 1.8
2.46 1.8
2.03 1.8
0.63 3.3
0.63 1.8
0.63 1.8
0.5 1.8
IDBVDD HPVDD
(mA)
(V)
0 3.3
0 3.3
0 1.8
0 3.3
0 3.3
0 1.8
0 3.3
0 3.3
0 1.8
1.54 3.3
0.8 3.3
0.8 2.7
0.8 1.8
1.54 3.3
0.8 3.3
0.8 2.7
0.8 1.8
0.062
3.3
0.004
3.3
0.004
2.7
0.004
1.8
0.062
3.3
0.004
3.3
0.004
2.7
0.004
1.8
0.062
3.3
0.004
3.3
0.004
2.7
0.004
1.8
0.094
3.3
0.004
3.3
0.004
2.7
0.004
1.8
IHPVDD SPKVDD ISPKVDD PLLVDD IPLLVDD
(mA) (V) (mA) (V) (mA)
0 3.3
0 3.3
0
0 3.3
0 2.7
0
0 3.3
0 1.8
0
0 3.3
0 3.3
0
0 3.3
0 2.7
0
0 3.3
0 1.8
0
0 3.3
0 3.3
0
0 3.3
0 2.7
0
0 3.3
0 1.8
0
0 3.3 0.007 3.3
1
0 3.3 0.007 3.3
1
0.52
3.3 0.006
2.7 0.84
0.31
3.3 0.004
1.8 0.64
5.3 3.3 0.007 3.3
1
5.44
3.3 0.007
3.3
1
5.28
3.3 0.006
2.7 0.84
5.33
3.3 0.004
1.8 0.64
0.68
3.3 0.007
3.3 0.09
0.68
3.3 0.007
3.3 0.09
0.52
3.3 0.005
2.7 0.071
0.31
3.3 0.004
1.8 0.044
5.14
3.3 0.007
3.3 0.09
5.45
3.3 0.007
3.3 0.09
5.46
3.3 0.005
2.7 0.07
5.18
3.3 0.004
1.8 0.044
29 3.3 0.007 3.3 0.09
29 3.3 0.007 3.3 0.09
19.5
3.3 0.005
2.7 0.071
8.8 3.3 0.004 1.8 0.044
5.27
3.3 0.007
3.3 0.016
5.27
3.3 0.007
3.3 0.016
5.26
3.3 0.006
2.7 0.013
5 3.3 0.004 1.8 0.008
Total
Power
(mW)
0.07
0.08
0.03
0.01
0.02
0.01
0.03
0.04
0.02
28.08
24.44
19.69
10.68
45.44
42.22
32.51
19.74
21.50
21.22
15.37
7.63
36.22
36.96
28.65
16.39
114.95
114.78
66.69
23.03
36.01
35.70
27.28
15.45
Table 1 Power Consumption Figures
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PD, Rev 4.2, November 2011
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