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PDF NB100ELT23L Data sheet ( Hoja de datos )

Número de pieza NB100ELT23L
Descripción Dual Differential LVPECL/LVDS to LVTTL Translator
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NB100ELT23L
3.3V Dual Differential
LVPECL/LVDS to LVTTL
Translator
The NB100ELT23L is a dual differential LVPECL/LVDS to LVTTL
translator. Because LVPECL (Positive ECL) or LVDS levels are used,
only +3.3 V and ground are required. The small outline 8-lead package
and the dual gate design of the ELT23L makes it ideal for applications
which require the translation of a clock and a data signal.
The ELT23L is available in only the ECL 100K standard. Since
there are no LVPECL outputs or an external VBB reference, the
ELT23L does not require both ECL standard versions. The LVPECL
inputs are differential. Therefore, the NB100ELT23L can accept any
standard differential LVPECL/LVDS input referenced from a VCC of
+3.3 V.
Features
2.1 ns Typical Propagation Delay
Maximum Operating Frequency > 160 MHz
24 mA LVTTL Outputs
Operating Range: VCC = 3.0 V to 3.6 V with GND = 0 V
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
www.onsemi.com
8
1
MARKING
DIAGRAMS*
SOIC−8
D SUFFIX
CASE 751
8
KT23L
ALYW
G
1
8
1
TSSOP−8
DT SUFFIX
CASE 948R
8
K23L
ALYWG
G
1
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2015
August, 2015 − Rev. 12
1
Publication Order Number:
NB100ELT23L/D

1 page




NB100ELT23L pdf
NB100ELT23L
ORDERING INFORMATION
Device
Package
Shipping
NB100ELT23LDG
SO−8
(Pb−Free)
98 Units / Rail
NB100ELT23LDR2G
SO−8
(Pb−Free)
2500 / Tape & Reel
NB100ELT23LDTG
TSSOP−8
(Pb−Free)
100 Units / Rail
NB100ELT23LDTR2G
TSSOP−8
(Pb−Free)
2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D − ECL Clock Distribution Techniques
AN1406/D − Designing with PECL (ECL at +5.0 V)
AN1503/D − ECLinPSt I/O SPiCE Modeling Kit
AN1504/D − Metastability and the ECLinPS Family
AN1568/D − Interfacing Between LVDS and ECL
AN1672/D − The ECL Translator Guide
AND8001/D − Odd Number Counters Design
AND8002/D − Marking and Date Codes
AND8020/D − Termination of ECL Logic Devices
AND8066/D − Interfacing with ECLinPS
AND8090/D − AC Characteristics of ECL Devices
www.onsemi.com
5

5 Page










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