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Datasheet NB100LVEP17 Equivalent ( PDF ) |
N.º | Número de pieza | Descripción | Fabricantes | Category |
1 | NB100LVEP17 | Quad Differential Driver/Receiver NB100LVEP17
2.5V / 3.3V Quad Differential Driver/Receiver
Description The NB100LVEP17 is a 4-bit differential line receiver. The design
incorporates two stages of gain, internal to the device, making it an excellent choice for use in high bandwidth amplifier applications.
The VBB pin, an internally | ON Semiconductor | driver |
NB1 Datasheet ( Hoja de datos ) - resultados coincidentes |
N.º | Número de pieza | Descripción | Fabricantes | Catagory |
1 | NB100ELT23L | Dual Differential LVPECL/LVDS to LVTTL Translator NB100ELT23L
3.3V Dual Differential LVPECL/LVDS to LVTTL Translator
The NB100ELT23L is a dual differential LVPECL/LVDS to LVTTL translator. Because LVPECL (Positive ECL) or LVDS levels are used, only +3.3 V and ground are required. The small outline 8-lead package and the dual gate design of the EL ON Semiconductor translator | | |
2 | NB100EP223 | 1:22 Differential HSTL/PECL to HSTL Clock Driver NB100EP223 3.3V 1:22 Differential HSTL/PECL to HSTL Clock Driver with LVTTL Clock Select and Output Enable
Description
http://onsemi.com MARKING DIAGRAM*
The NB100EP223 is a low skew 1−to−22 differential clock driver, designed with clock distribution in mind, accepting two clock sources into a ON Semiconductor driver | | |
3 | NB100LVEP17 | Quad Differential Driver/Receiver NB100LVEP17
2.5V / 3.3V Quad Differential Driver/Receiver
Description The NB100LVEP17 is a 4-bit differential line receiver. The design
incorporates two stages of gain, internal to the device, making it an excellent choice for use in high bandwidth amplifier applications.
The VBB pin, an internally ON Semiconductor driver | | |
4 | NB100LVEP221 | 1:20 Differential HSTL/ECL/PECL Clock Driver NB100LVEP221 2.5V/3.3V 1:20 Differential HSTL/ECL/PECL Clock Driver
Description
The NB100LVEP221 is a low skew 1−to−20 differential clock driver, designed with clock distribution in mind, accepting two clock sources into an input multiplexer. The two clock inputs are differential ECL/PECL; CLK1 ON Semiconductor driver | | |
5 | NB100LVEP222 | 1:15 Differential ECL/PECL /1 /2 Clock Driver NB100LVEP222 2.5 V/3.3 V 1:15 Differential ECL/PECL ÷1/÷2 Clock Driver
The NB100LVEP222 is a low skew 1:15 differential ÷1/÷2 ECL fanout buffer designed with clock distribution in mind. The LVECL/LVPECL input signal pairs can be used in a differential configuration or single−ended (with VBB ou ON Semiconductor driver | | |
6 | NB100LVEP224 | 1:24 Differential ECL/PECL Clock Driver NB100LVEP224 2.5V/3.3V 1:24 Differential ECL/PECL Clock Driver with Clock Select and Output Enable
Description
http://onsemi.com MARKING DIAGRAM*
The NB100LVEP224 is a low skew 1−to−24 differential clock driver, designed with clock distribution in mind, accepting two clock sources into an inpu ON Semiconductor driver | | |
7 | NB100LVEP56 | ECL Dual Differential 2:1 Multiplexer NB100LVEP56
2.5V / 3.3V ECL DUAL Differential 2:1 Multiplexer
Description The NB100LVEP56 is a dual, fully differential 2:1 multiplexer. The
differential data path makes the device ideal for multiplexing low skew clock or differential data signals. The device features both individual and common sel ON Semiconductor multiplexer | |
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Número de pieza | Descripción | Fabricantes | |
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