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PDF NCP1217A Data sheet ( Hoja de datos )
| Número de pieza | NCP1217A | |
| Descripción | Enhanced PWM Current-Mode Controller | |
| Fabricantes | ON Semiconductor | |
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NCP1217, NCP1217A
Enhanced PWM Current-Mode
Controller for High-Power
Universal Off-Line Supplies
Housed in an SO−8 or PDIP−7 package, the NCP1217 represents
the enhanced version of the NCP1203−based controllers. Due to its
high drive capability, NCP1217 drives large gate−charge MOSFETs,
which together with internal ramp compensation and built−in
overvoltage protection, ease the design of modern AC/DC adapters.
NCP1217 offers a true alternative to UC384X−based designs.
With an internal structure operating at different fixed frequencies
(65–100–133 kHz), the controller features a high−voltage startup FET,
which ensures a clean and loss less startup sequence. Its current−mode
control topology provides an excellent input audio−susceptibility and
inherent pulse−by−pulse control. Internal ramp compensation easily
prevents subharmonic oscillations from taking place in continuous
conduction mode designs.
When the current setpoint falls below a given value, e.g. the output
power demand diminishes, the IC automatically enters the so−called
skip cycle mode and provides excellent efficiency at light loads.
Because this occurs at a user adjustable low peak current, no acoustic
noise takes place.
The NCP1217 features two efficient protective circuitries: 1) In
presence of an overcurrent condition, the output pulses are disabled
and the device enters a safe burst mode, trying to restart. Once the
default has gone, the device auto−recovers. 2) If an external signal
(e.g. a temperature sensor) pulls Pin 1 above 3.2 V, output pulses are
immediately stopped and the NCP1217 stays latched in this position.
Reset occurs when the VCC collapses to ground, e.g. the user unplugs
the power supply.
Features
• Current−Mode with Adjustable Skip−Cycle Capability
• Built−in Internal Ramp Compensation
• Auto−Recovery Internal Output Short−Circuit Protection
• Internal 1.0 ms Soft−Start (NCP1217A Only)
• Limited Duty−Cycle to 50% (NCP1217A Only)
• Full Latchoff if Adjustment Pin is Brought High
• Extremely Low No−Load Standby Power
• Internal Temperature Shutdown
• 500 mA Peak Current Capability
• Fixed Frequency Versions at 65 kHz, 100 kHz and 133 kHz
• Direct Optocoupler Connection
• Internal Leading Edge Blanking
• SPICE Models Available for TRANsient and AC Analysis
• These are Pb−Free Devices
Typical Applications
• High Power AC/DC Converters for TVs, Set−Top Boxes, etc.
• Offline Adapters for Notebooks
• Telecom DC−DC Converters
• All Power Supplies
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8
1
SOIC−8
D SUFFIX
CASE 751
MARKING
DIAGRAMS
8
XXXXX
ALYW
G
1
8
1
PDIP−7
P SUFFIX
CASE 626B
XXXXXXXXX
AWL
YYWWG
1
XXXXXX = Specific Device Code
A = Assembly Location
L, WL = Wafer Lot
Y, YY = Year
W, WW = Work Week
G or G = Pb−Free Package
DEVICE MARKING INFORMATION
See detailed device marking information in the ordering
information section on page 17 of this data sheet.
PIN CONNECTIONS
Adj 1
FB 2
CS 3
GND 4
8 HV
7 NC
6 VCC
5 Drv
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the ordering
information section on page 17 of this data sheet.
© Semiconductor Components Industries, LLC, 2015
April, 2015 − Rev. 9
1
Publication Order Number:
NCP1217/D
1 page  
NCP1217, NCP1217A
ELECTRICAL CHARACTERISTICS (continued) (For typical values TJ = 25°C, for min/max values TJ = 0°C to +125°C,
Max TJ = 150°C, VCC = 11 V unless otherwise noted.)
Characteristic
Pin Symbol
Min
Typ
Max Unit
FEEDBACK SECTION (VCC = 11 V, Pin 5 Loaded by 1.0 kW)
Internal Pull−Up Resistor
2 Rup − 19 − kW
Pin 2 (FB) to Internal Current Setpoint Division Ratio
− Iratio
−
3.3
−
−
SKIP CYCLE GENERATION
Default Skip Mode Level
1
Vskip
0.93
1.1
1.26 V
Pin 1 Internal Output Impedance
1 Zout
−
27
− kW
INTERNAL RAMP COMPENSATION
Internal Ramp Level @ 25°C (Note 3)
3 Vramp 2.6 2.9 3.2 V
Internal Ramp Resistance to CS Pin
3 Rramp
−
19
− kW
ADJUSTMENT LATCHOFF LEVEL
Latching Level
1
Vlatch
2.69
3.10
3.42
V
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. A 1.0 MW resistor is connected to the ground for the measurement.
TYPICAL CHARACTERISTICS
80
70
60
50
40
30
20
10
0
−50
0 50 100
TEMPERATURE (°C)
150
Figure 3. High Voltage Pin Leakage Current vs.
Temperature
14.0
13.5
13.0
12.5
12.0
11.5
11.0
−50
0 50 100
TEMPERATURE (°C)
Figure 4. VCCOFF vs. Temperature
150
9.0
8.5
8.0
7.5
7.0
−50
0 50 100
TEMPERATURE (°C)
Figure 5. VCCMIN vs. Temperature
150
3.0
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
−50
133 kHz
100 kHz
65 kHz
0 50 100 150
TEMPERATURE (°C)
Figure 6. ICC 1.0 nF Load vs. Temperature
www.onsemi.com
5
5 Page 
NCP1217, NCP1217A
Power P1
Power P2
Power P3
Figure 20. Output Pulses at Various Power Levels (X = 5.0 ms/div) P1 t P2 t P3
300 M
200 M
100 M
0
MAX PEAK
CURRENT
SKIP CYCLE
CURRENT LIMIT
315.40 U 882.70 U
1.450 M
2.017 M
2.585 M
Figure 21. The Skip Cycle Takes Place at Low Peak Currents which Guarantees Noise−Free Operation
Sufficient margin shall be kept between normal Pin1 level and the latchoff point in order to avoid false triggering.
Ramp Compensation
Ramp compensation is a known mean to cure
subharmonic oscillations. These oscillations take place at
half the switching frequency and occur only during
Continuous Conduction Mode (CCM) with a duty−cycle
greater than 50%. To lower the current loop gain, one usually
injects between 50 and 100% of the inductor down−slope.
Figure 22 depicts how internally the ramp is generated.
www.onsemi.com
11
11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet NCP1217A.PDF ] | |
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