NE5517 PDF даташит
Спецификация NE5517 изготовлена «ON Semiconductor» и имеет функцию, называемую «Dual Operational Transconductance Amplifier». |
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Детали детали
Номер произв | NE5517 |
Описание | Dual Operational Transconductance Amplifier |
Производители | ON Semiconductor |
логотип |
15 Pages
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NE5517, NE5517A, AU5517
Dual Operational
Transconductance Amplifier
The AU5517 and NE5517 contain two current-controlled
transconductance amplifiers, each with a differential input and
push-pull output. The AU5517/NE5517 offers significant design and
performance advantages over similar devices for all types of
programmable gain applications. Circuit performance is enhanced
through the use of linearizing diodes at the inputs which enable a
10 dB signal-to-noise improvement referenced to 0.5% THD. The
AU5517/NE5517 is suited for a wide variety of industrial and
consumer applications.
Constant impedance of the buffers on the chip allow general use of
the AU5517/NE5517. These buffers are made of Darlington
transistors and a biasing network that virtually eliminate the change of
offset voltage due to a burst in the bias current IABC, hence eliminating
the audible noise that could otherwise be heard in high quality audio
applications.
Features
• Constant Impedance Buffers
• DVBE of Buffer is Constant with Amplifier IBIAS Change
• Excellent Matching Between Amplifiers
• Linearizing Diodes
• High Output Signal-to-Noise Ratio
• Pb−Free Packages are Available*
Applications
• Multiplexers
• Timers
• Electronic Music Synthesizers
• Dolby® HX Systems
• Current-Controlled Amplifiers, Filters
• Current-Controlled Oscillators, Impedances
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2013
June, 2013 − Rev. 4
1
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MARKING
DIAGRAMS
SOIC−16
1
D SUFFIX
CASE 751B
xx5517DG
AWLYWW
1
1
PDIP−16
N SUFFIX
CASE 648
NE5517yy
AWLYYWWG
1
xx = AU or NE
yy = AN or N
A = Assembly Location
WL = Wafer Lot
YY, Y = Year
WW = Work Week
G = Pb−Free Package
PIN CONNECTIONS
N, D Packages
IABCa 1
Da 2
+INa 3
−INa 4
VOa 5
V− 6
INBUFFERa 7
VOBUFFERa 8
16 IABCb
15 Db
14 +INb
13 −INb
12 VOb
11 V+
10 INBUFFERb
9 VOBUFFERb
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 13 of this data sheet.
Publication Order Number:
NE5517/D
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PIN DESCRIPTION
Pin No.
Symbol
1 IABCa
2 Da
3 +INa
4 −INa
5 VOa
6 V−
7 INBUFFERa
8 VOBUFFERa
9 VOBUFFERb
10 INBUFFERb
11 V+
12 VOb
13 −INb
14 +INb
15 Db
16 IABCb
NE5517, NE5517A, AU5517
Amplifier Bias Input A
Diode Bias A
Non-inverted Input A
Inverted Input A
Output A
Negative Supply
Buffer Input A
Buffer Output A
Buffer Output B
Buffer Input B
Positive Supply
Output B
Inverted Input B
Non-inverted Input B
Diode Bias B
Amplifier Bias Input B
Description
V+
11
D4
Q6
Q7
D6
Q10
Q11
Q14 Q12
7,10
Q13
8,9
2,15
D2
−INPUT
4,13
1,16
AMP BIAS
INPUT
Q4 Q5
Q2
Q1
D1
V−
6
D3
+INPUT
3,14
Q8
VOUTPUT
5,12
Q15 Q16
Q9
R1
D5
Figure 1. Circuit Schematic
D7
D8
Q3
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NE5517, NE5517A, AU5517
B
AMP
BIAS
INPUT
16
B
DIODE
BIAS
15
B
INPUT
(+)
14
B
INPUT
(−)
13
B
OUTPUT
12
V+ (1)
11
B
BUFFER
INPUT
10
B
BUFFER
OUTPUT
9
−
B
+
+
A
−
123
45
6
7
AMP
BIAS
INPUT
A
DIODE
BIAS
A
INPUT
(+)
A
INPUT
(−)
A
OUTPUT
A
V−
BUFFER
INPUT
A
NOTE: V+ of output buffers and amplifiers are internally connected.
8
BUFFER
OUTPUT
A
Figure 2. Connection Diagram
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Supply Voltage (Note 1)
Power Dissipation, Tamb = 25 °C (Still Air) (Note 2)
NE5517N, NE5517AN
NE5517D, AU5517D
VS
44 VDC or ±22
V
PD mW
1500
1125
Thermal Resistance, Junction−to−Ambient
D Package
N Package
RqJA
°C/W
140
94
Differential Input Voltage
Diode Bias Current
Amplifier Bias Current
Output Short-Circuit Duration
Buffer Output Current (Note 3)
Operating Temperature Range
NE5517N, NE5517AN
AU5517T
VIN
ID
IABC
ISC
IOUT
Tamb
±5.0
2.0
2.0
Indefinite
20
0 °C to +70 °C
−40 °C to +125 °C
V
mA
mA
mA
°C
Operating Junction Temperature
TJ 150 °C
DC Input Voltage
VDC
+VS to −VS
Storage Temperature Range
Tstg
−65 °C to +150 °C
°C
Lead Soldering Temperature (10 sec max)
Tsld 230 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. For selections to a supply voltage above ±22 V, contact factory.
2. The following derating factors should be applied above 25 °C
N package at 10.6 mW/°C
D package at 7.1 mW/°C.
3. Buffer output current should be limited so as to not exceed package dissipation.
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